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74HC2G17GWNXPN/a30000avaiDual non-inverting Schmitt-trigger


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74HC2G17GW
Dual non-inverting Schmitt-trigger
General descriptionThe 74HC2G17; 74HCT2G17 is a high-speed Si-gate CMOS device.
The 74HC2G17; 74HCT2G17 provides two non-inverting Schmitt trigger buffers. They are
capable of transforming slowly changing input signals into sharply defined, jitter-free
output signals.
The inputs switchat different pointsfor positive and negative-going signals. The difference
between the positive voltage VT+ and the negative voltage VT− is defined as the input
hysteresis voltage VH. Features Wide supply voltage range from 2.0 Vto 6.0V Complies with JEDEC standard no. 7A High noise immunity ESD protection: HBM JESD22-A114-D exceeds 2000V MM JESD22-A115-A exceeds 200V Low power dissipation Balanced propagation delays Unlimited input rise and fall times Multiple package options Specified from −40 °Cto+85 °C and −40°Cto +125°C Applications Wave and pulse shaper for highly noisy environments Astable multivibrators Monostable multivibrators
74HC2G17; 74HCT2G17
Dual non-inverting Schmitt trigger
Rev. 01 — 6 October 2006 Product data sheet
NXP Semiconductors 74HC2G17; 74HCT2G17
Dual non-inverting Schmitt trigger Ordering information Marking Functional diagram
Table 1. Ordering information

74HC2G17GW −40 °C to +125°C SC-88 plastic surface-mounted package; 6 leads SOT363
74HC2G17GV −40 °C to +125°C SC-74 plastic surface-mounted package (TSOP6); 6 leads SOT457
74HCT2G17GW −40 °C to +125°C SC-88 plastic surface-mounted package; 6 leads SOT363
74HCT2G17GV −40 °C to +125°C SC-74 plastic surface-mounted package (TSOP6); 6 leads SOT457
Table 2. Marking

74HC2G17GW HV
74HC2G17GV HV
74HCT2G17GW TV
74HCT2G17GV TV
NXP Semiconductors 74HC2G17; 74HCT2G17
Dual non-inverting Schmitt trigger Pinning information
7.1 Pinning
7.2 Pin description Functional description

[1]H= HIGH voltage level;= LOW voltage level.
Table 3. Pin description
1 data input
GND 2 ground (0V) 3 data input 4 data output
VCC 5 supply voltage 6 data output
Table 4. Function table[1]

NXP Semiconductors 74HC2G17; 74HCT2G17
Dual non-inverting Schmitt trigger Limiting values

[1] The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SC-88 and SC-74 packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K.
10. Recommended operating conditions
11. Static characteristics
Table 5. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
VCC supply voltage −0.5 +7.0 V
IIK input clamping current VI < −0.5 V or VI >VCC+ 0.5 V [1]- ±20 mA
IOK output clamping current VO< −0.5 V or VO >VCC+ 0.5V [1]- ±20 mA output current VO = −0.5 V to VCC+ 0.5V [1]- ±25 mA
ICC supply current [1] -50 mA
IGND ground current [1]- −50 mA
Tstg storage temperature −65 +150 °C
Ptot total power dissipation [2]- 250 mW
Table 6. Recommended operating conditions
Type 74HC2G17

VCC supply voltage 2.0 5.0 6.0 V input voltage 0 - VCC V output voltage 0 - VCC V
Tamb ambient temperature −40 +25 +125 °C
Type 74HCT2G17

VCC supply voltage 4.5 5.0 5.5 V input voltage 0 - VCC V output voltage 0 - VCC V
Tamb ambient temperature −40 +25 +125 °C
Table 7. Static characteristics for 74HC2G17

At recommended operating conditions; voltages are referenced to GND (ground=0V).
Tamb = 25
°C
VOH HIGH-level output voltage VI = VIH or VIL= −20 μA; VCC = 2.0V 1.9 2.0 - V= −20 μA; VCC = 4.5V 4.4 4.5 - V= −20 μA; VCC = 6.0V 5.9 6.0 - V= −4.0 mA; VCC= 4.5V 4.18 4.32 - V= −5.2 mA; VCC= 6.0V 5.68 5.81 - V
NXP Semiconductors 74HC2G17; 74HCT2G17
Dual non-inverting Schmitt trigger

VOL LOW-level output voltage VI = VIH or VIL = 20 μA; VCC = 2.0V - 0 0.1 V = 20 μA; VCC = 4.5V - 0 0.1 V = 20 μA; VCC = 6.0V - 0 0.1 V = 4.0 mA; VCC = 4.5V - 0.15 0.26 V = 5.2 mA; VCC = 6.0V - 0.16 0.26 V input leakage current VI = GND or VCC; VCC = 6.0V - - ±0.1 μA
ICC supply current VI = GND or VCC; IO = 0 A;
VCC = 6.0V - 1.0 μA input capacitance - 2.0 - pF
Tamb =
−40 °C to +85°C
VOH HIGH-level output voltage VI = VIH or VIL= −20 μA; VCC = 2.0V 1.9 - - V= −20 μA; VCC = 4.5V 4.4 - - V= −20 μA; VCC = 6.0V 5.9 - - V= −4.0 mA; VCC = 4.5V 4.13 - - V= −5.2 mA; VCC = 6.0V 5.63 - - V
VOL LOW-level output voltage VI = VIH or VIL = 20 μA; VCC = 2.0V - - 0.1 V = 20 μA; VCC = 4.5V - - 0.1 V = 20 μA; VCC = 6.0V - - 0.1 V = 4.0 mA; VCC = 4.5V - - 0.33 V = 5.2 mA; VCC = 6.0V - - 0.33 V input leakage current VI = GND or VCC; VCC = 6.0V - - ±1.0 μA
ICC supply current VI = GND or VCC; IO = 0 A;
VCC = 6.0V - 10.0 μA
Tamb =
−40 °C to +125°C
VOH HIGH-level output voltage VI = VIH or VIL= −20 μA; VCC = 2.0V 1.9 - - V= −20 μA; VCC = 4.5V 4.4 - - V= −20 μA; VCC = 6.0V 5.9 - - V= −4.0 mA; VCC = 4.5V 3.7 - - V= −5.2 mA; VCC = 6.0V 5.2 - - V
Table 7. Static characteristics for 74HC2G17 …continued

At recommended operating conditions; voltages are referenced to GND (ground=0V).
NXP Semiconductors 74HC2G17; 74HCT2G17
Dual non-inverting Schmitt trigger

VOL LOW-level output voltage VI = VIH or VIL = 20 μA; VCC = 2.0V - - 0.1 V = 20 μA; VCC = 4.5V - - 0.1 V = 20 μA; VCC = 6.0V - - 0.1 V = 4.0 mA; VCC = 4.5V - - 0.4 V = 5.2 mA; VCC = 6.0V - - 0.4 V input leakage current VI = GND or VCC; VCC = 6.0V - - ±1.0 μA
ICC supply current VI = GND or VCC; IO = 0 A;
VCC = 6.0V - 20.0 μA
Table 7. Static characteristics for 74HC2G17 …continued

At recommended operating conditions; voltages are referenced to GND (ground=0V).
Table 8. Static characteristics for 74HCT2G17

At recommended operating conditions; voltages are referenced to GND (ground=0V).
Tamb = 25
°C
VOH HIGH-level output voltage VI = VIH or VIL; VCC = 4.5V= −20μA 4.4 4.5 - V= −4.0 mA 4.18 4.32 - V
VOL LOW-level output voltage VI = VIH or VIL; VCC = 4.5V= −20μA - 0 0.1 V= −4.0 mA - 0.15 0.26 V input leakage current VI = GND or VCC; VCC = 5.5V - - ±0.1 μA
ICC supply current VI = GND or VCC; IO = 0A;
VCC = 5.5V - 1.0 μA
ΔICC additional supply current VI = VCC − 2.1V;
VCC= 4.5V to 5.5 V; IO = 0 A - 300 μA input capacitance - 2.0 - pF
Tamb =
−40 °C to +85°C
VOH HIGH-level output voltage VI = VIH or VIL; VCC = 4.5V= −20μA 4.4 - - V= −4.0 mA 4.13 - - V
VOL LOW-level output voltage VI = VIH or VIL; VCC = 4.5V= −20μA - - 0.1 V= −4.0 mA - - 0.33 V input leakage current VI = GND or VCC; VCC = 5.5V - - ±1.0 μA
ICC supply current VI = GND or VCC; IO = 0A;
VCC = 5.5V - 10.0 μA
ΔICC additional supply current VI = VCC − 2.1V;
VCC= 4.5V to 5.5 V; IO = 0 A - 375 μA
NXP Semiconductors 74HC2G17; 74HCT2G17
Dual non-inverting Schmitt trigger
12. Dynamic characteristics
Tamb =
−40 °C to +125°C
VOH HIGH-level output voltage VI = VIH or VIL; VCC = 4.5V= −20μA 4.4 - - V= −4.0 mA 3.7 - - V
VOL LOW-level output voltage VI = VIH or VIL; VCC = 4.5V= −20μA - - 0.1 V= −4.0 mA - - 0.4 V input leakage current VI = GND or VCC; VCC = 5.5V - - ±1.0 μA
ICC supply current VI = GND or VCC; IO = 0A;
VCC = 5.5V - 20.0 μA
ΔICC additional supply current VI = VCC − 2.1V;
VCC= 4.5V to 5.5 V; IO = 0 A - 410 μA
Table 8. Static characteristics for 74HCT2G17 …continued

At recommended operating conditions; voltages are referenced to GND (ground=0V).
Table 9. Dynamic characteristics

Voltages are referenced to GND (ground=0 V); for test circuit see Figure6.
74HC2G17

tpd propagation delay nA to nY; see Figure5 [1]
VCC = 2.0 V; CL=50pF - 36 115 - 140 175 ns
VCC = 4.5 V; CL=50pF - 12 22 - 27 34 ns
VCC = 6.0 V; CL=50pF - 10 18 - 22 28 ns transition time nY; see Figure5 [2]
VCC = 2.0 V; CL=50pF - 20 75 - 95 110 ns
VCC = 4.5 V; CL=50pF - 7 15 - 19 22 ns
VCC = 6.0 V; CL=50pF - 5 13 - 16 19 ns
CPD power dissipation
capacitance = GND to VCC [3] -10- - - - pF
NXP Semiconductors 74HC2G17; 74HCT2G17
Dual non-inverting Schmitt trigger

[1] tpd is the same as tPLH and tPHL
[2] tt is the same as tTLH and tTHL
[3] CPD is used to determine the dynamic power dissipation (PD in μW). =CPD× VCC2×fi× N+ Σ(CL× VCC2× fo) where:= input frequency in MHz;= output frequency in MHz;= output load capacitance in pF;
VCC= supply voltage in V;= number of inputs switching;
Σ(CL× VCC2×fo)= sum of the outputs.
13. Waveforms
74HCT2G17

tpd propagation delay nA to nY; see Figure5 [1]
VCC = 4.5 V; CL=50pF - 21 29 - 36 45 ns transition time nY; see Figure5 [2]
VCC = 4.5 V; CL= 50 pF - 6 15 - 19 22 ns
CPD power dissipation
capacitance = GND to VCC − 1.5 V [3] -10- - - - pF
Table 9. Dynamic characteristics …continued

Voltages are referenced to GND (ground=0 V); for test circuit see Figure6.
Table 10. Measurement points

74HC2G17 0.5VCC GND to VCC 6.0 ns 0.5VCC
74HCT2G17 1.3V GND to 3.0 V 6.0 ns 1.3V
NXP Semiconductors 74HC2G17; 74HCT2G17
Dual non-inverting Schmitt trigger
14. Transfer characteristics
Table 11. Test data

74HC2G17 GND to VCC 6ns open
74HCT2G17 GND to 3.0 V 6ns open
Table 12. Transfer characteristics

Voltages are referenced to GND (ground=0 V); for test circuit see Figure6.
74HC2G17

VT+ positive-going
threshold voltage
see Figure7, Figure8
VCC = 2.0 V 1.00 1.18 1.50 1.00 1.50 1.50 V
VCC = 4.5 V 2.30 2.60 3.15 2.30 3.15 3.15 V
VCC = 6.0 V 3.00 3.46 4.20 3.00 4.20 4.20 V
VT− negative-going
threshold voltage
see Figure7, Figure8
VCC = 2.0 V 0.30 0.60 0.90 0.30 0.90 0.90 V
VCC = 4.5 V 1.13 1.47 2.00 1.13 2.00 2.00 V
VCC = 6.0 V 1.50 2.06 2.60 1.50 2.60 2.60 V hysteresis voltage VT+− VT−; see Figure7,
Figure 8 and Figure9
VCC = 2.0 V 0.30 0.60 1.00 0.30 1.00 1.00 V
VCC = 4.5 V 0.60 1.13 1.40 0.60 1.40 1.40 V
VCC = 6.0 V 0.80 1.40 1.70 0.80 1.70 1.70 V
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