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74FCT162543ATPACTTIN/a176avai16-Bit Registered Transceivers with 3-State Outputs


74FCT162543ATPACT ,16-Bit Registered Transceivers with 3-State OutputsBlock Diagrams Pin ConfigurationOEBA1Top ViewCEBA1SSOP/TSSOPLEBA1OEAB OEBA1 1 56 1OEAB12 55LEAB LEB ..
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74FCT162543ATPACT
16-Bit Registered Transceivers with 3-State Outputs
Featuresoff supports partial-power-down mode operation Edge-rate control circuitry for significantly improved
noise characteristics Typical output skew < 250 ps ESD > 2000V TSSOP (19.6-mil pitch) and SSOP (25-mil pitch)
packages Industrial temperature range of
−40˚C to +85˚CCC = 5V ± 10%
CY74FCT16543T Features: 64 mA sink current, 32 mA source current Typical V OLP (ground bounce) <1.0V at VCC = 5V,A = 25˚C
CY74FCT162543T Features: Balanced 24 mA output drivers Reduced system switching noise Typical V OLP (ground bounce) <0.6V at VCC = 5V,A = 25˚C
CY74FCT162H543T Features: Bus hold retains last active state Eliminates the need for external pull-up or pull-down
resistors
Functional Description

The CY74FCT16543T and CY74FCT162543T are 16-bit,
high-speed, lowpowerlatchedtransceiversthatareorganized astwo
independent 8-bitD-type latched transceivers containing two setsof
eight D-type latches with separate Latch Enable (LEAB,LEAB) and
Output Enable (OEAB, OEAB) controlsfor each setto permit
independent controlof inputting and outputtingin either directionof
data flow. For data flow fromAtoB,for example,the A-to-B input
Enable (CEAB) mustbeLOWinorderto enterdata fromAor totake
data fromBas indicatedinthe truth table. With CAEB LOW, aLOW
signalonthe A-to-B Latch Enable (LEAB) makesthe A-to-B latches
transparent;a subsequent LOW-to-HIGH transitionof the LEAB
signal putstheA latchesinthe storage mode and their outputsno
longer change withtheA inputs. With CEAB and OEAB both LOW,
thethree-state Boutputbuffersare activeandreflectthe datapresentthe outputoftheA latches. Controlof data fromBtoAis similar,
but uses CEAB, LEAB, and OEAB inputs flow-through pinout and
small shrink packaging and in simplifying board design.
This device is fully specified for partial-power-down
applications usingIoff. TheIoff circuitry disables the outputs,
preventing damaging current backflow through the device
when it is powered down.
The CY74FCT16543T is ideally suited for driving
high-capacitance loads and low-impedance backplanes.
The CY74FCT162543T has 24-mA balanced output drivers
with current limiting resistorsin the outputs. This reduces the
need for external terminating resistors and provides for
minimal undershoot and reduced ground bounce. The
CY74FCT162543T is ideal for driving transmission lines.
The CY74FCT162H543Tisa 24-mAbalanced output partthat
has “bus hold” on the data inputs. The device retains the
input’s last state whenever the input goesto high impedance.
This eliminates the need for pull-up/down resistors and
prevents floating inputs.
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