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74F675APCFAIRCHILDN/a280avai16-Bit Serial-In Serial/Parallel-Out Shift Register
74F675APCNSN/a255avai16-Bit Serial-In Serial/Parallel-Out Shift Register
74F675ASCXFAIN/a144avai16-Bit Serial-In Serial/Parallel-Out Shift Register
74F675ASPCNSN/a2avai16-Bit Serial-In Serial/Parallel-Out Shift Register


74F675APC ,16-Bit Serial-In Serial/Parallel-Out Shift RegisterFeaturesThe 74F675A contains a 16-bit serial in/serial out shift reg-

74F675APC-74F675ASCX-74F675ASPC
16-Bit Serial-In Serial/Parallel-Out Shift Register
74F675A 16-Bit Serial-In, Serial/Parallel-Out Shift Register April 1988 Revised October 2000 74F675A 16-Bit Serial-In, Serial/Parallel-Out Shift Register General Description Features The 74F675A contains a 16-bit serial in/serial out shift reg-Serial-to-parallel converter ister and a 16-bit parallel out storage register. Separate16-Bit serial I/O shift register serial input and output pins are provided for expansion to 16-Bit parallel out storage register longer words. By means of a separate clock, the contents Recirculating parallel transfer of the shift register are transferred to the storage register. The contents of the storage register can also be loadedExpandable for longer words back into the shift register. A HIGH signal on the ChipSlim 24 lead package Select input prevents both shifting and parallel loading. 74F675A version prevents false clocking through CS or R/W inputs Ordering Code: Order Number Package Number Package Description 74F675ASC M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74F675APC N24A 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-011, 0.600 Wide 74F675ASPC N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols IEEE/IEC Connection Diagram © 2000 DS009587
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