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74ALVT16652DGGPHIN/a57avai2.5V/3.3V 16-bit bus transceiver/register (3-State)


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74ALVT16652DGG
2.5V/3.3V 16-bit bus transceiver/register 3-State
Product specification
Supersedes data of 1996 Aug 13
IC23 Data Handbook
1998 Feb 13
Philips Semiconductors Product specification
74ALVT166522.5V/3.3V 16-bit bus transceiver/register
(3-State)
FEATURES
16–bit bus interface 5V I/O Compatible 3-State buffers Output capability: +64mA/-32mA TTL input and output switching levels Input and output interface capability to systems at 5V supply Bus-hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs• Live insertion/extraction permitted Power-up reset Power-up 3-State No bus current loading when output is tied to 5V bus Latch-up protection exceeds 500mA per JEDEC JC40.2 Std 17 ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
DESCRIPTION

The 74ALVT16652 is a high-performance BiCMOS product
designed for VCC operation at 2.5V or 3.3V with I/O compatibility up
to 5V. The device can be used as two 8-bit transceivers or one
16-bit transceiver.
Complimentary output-enable (OEAB and OEBA) inputs are
provided to control the transceiver functions. Select-control (SAB
and SBA) inputs are provided to select whether real-time or stored
data is transferred. A Low-input level selects real-time data, and a
High input level selects stored data. The circuitry used for select
control eliminates the typical decoding glitch that occurs in a
multiplexer during the transition between stored and real-time data.
Data on the A or B bus, or both, can be stored in the internal
flip-flops by Low-to-High transitions at the appropriate clock (CPAB
or CPBA) inputs regardless of the levels on the select-control or
output-enable inputs. When SAB and SBA are in real-time transfer
mode, it is possible to store data without using the internal D-type
flip-flops by simultaneously enabling OEAB and OEBA. In this
configuration, each output reinforces its input. Thus, when all other
data sources to the two sets of bus lines are at high impedance,
each set of bus lines remains at its last level configuration.
QUICK REFERENCE DATA
ORDERING INFORMATION
LOGIC SYMBOL (IEEE/IEC)
Philips Semiconductors Product specification
74ALVT166522.5V/3.3V 16-bit bus transceiver/register
(3-State)
PIN CONFIGURATION
LOGIC SYMBOL
PIN DESCRIPTION
Philips Semiconductors Product specification
74ALVT166522.5V/3.3V 16-bit bus transceiver/register
(3-State)
LOGIC DIAGRAM
FUNCTION TABLE
= High voltage level= Low voltage level= Don’t care= Low-to-High clock transition
Philips Semiconductors Product specification
74ALVT166522.5V/3.3V 16-bit bus transceiver/register
(3-State)
The following examples demonstrate the four fundamental
bus-management functions that can be performed with the
74ALVT16652. The select pins determine whether data is stored or
transferred through the device in real time. The output enable pins
determine the direction of the data flow.
Philips Semiconductors Product specification
74ALVT166522.5V/3.3V 16-bit bus transceiver/register
(3-State)
ABSOLUTE MAXIMUM RATINGS1, 2
NOTES:
Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
Philips Semiconductors Product specification
74ALVT166522.5V/3.3V 16-bit bus transceiver/register
(3-State)
DC ELECTRICAL CHARACTERISTICS (3.3V �0.3V RANGE)

GND = 0V; tR = tF = 2.5ns; CL = 50pF; RL = 500Ω; Tamb = –40°C to +85°C.
NOTES:
All typical values are at VCC = 3.3V and Tamb = 25°C. This is the increase in supply current for each input at the specified voltage level other than VCC or GND This parameter is valid for any VCC between 0V and 1.2V with a transition time of up to 10msec. From VCC = 1.2V to VCC = 3.3V ± 0.3V a
transition time of 100μsec is permitted. This parameter is valid for Tamb = 25°C only. Unused pins at VCC or GND. ICCZ is measured with outputs pulled up to VCC or pulled down to ground. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power. This is the bus hold overdrive current required to force the input to the opposite logic state.
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