74AHCT30D ,8-input NAND gateINTEGRATED CIRCUITSDATA SHEET74AHC30; 74AHCT308-input NAND gateProduct specification 1999 Nov 30File ..
74AHCT32D ,Quad 2-input OR gatePin configuration. Fig.2
74AHCT32PW ,Quad 2-input OR gatePin configuration. Fig.2
74AHCT32PW ,Quad 2-input OR gateFEATURES QUICK REFERENCE DATAGND = 0 V; T =25 °C; t =t ≤ 3.0 ns.amb r f• ESD protection:HBM EIA/JES ..
74AHCT32PW ,Quad 2-input OR gateFeaturesn Balanced propagation delaysn All inputs have Schmitt-trigger actionsn Inputs accept volta ..
74AHCT373D ,Octal D-type transparent latch; 3-stateGeneral descriptionThe 74AHC373; 74AHCT373 is a high-speed Si-gate CMOS device and is pin compatibl ..
74HC4017PW ,74HC/HCT4017; Johnson decade counter with 10 decoded outputsFeatures and benefits Wide supply voltage range from 2.0 V to 6.0 V Input levels: For 74HC4017: ..
74HC4020 ,14-stage binary ripple counter
74HC4020 ,14-stage binary ripple counter
74HC4020 ,14-stage binary ripple counter
74HC4020D ,14-stage binary ripple counterINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HC4020DB ,74HC/HCT4020; 14-stage binary ripple counterINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74AHCT30D
8-input NAND gate
Philips Semiconductors Product specification
8-input NAND gate 74AHC30; 74AHCT30
FEATURES ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000V EIA/JESD22-A115-A exceeds 200V
CDM EIA/JESD22-C101 exceeds 1000V Balanced propagation delays Inputs accept voltages higher than VCC For AHC only: operates with CMOS input levels For AHCT only: operates with TTL input levels Output capability: standard ICC category: SSI Specified from −40to +85 °C and −40to +125 °C.
DESCRIPTIONThe 74AHC/AHCT30 are high-speed Si-gate CMOS
devices and are pin compatible with Low power Schottky
TTL (LSTTL). They are specified in compliance with
JEDEC standard no. 7A.
The 74AHC/AHCT30 provide the 8-input NAND function.
QUICK REFERENCE DATAGND=0 V; Tamb =25 °C; tr =tf≤ 3.0 ns.
Notes CPD is used to determine the dynamic power dissipation (PDin μW). =CPD× VCC2×fi+∑ (CL× VCC2×fo) where:= input frequency in MHz;= output frequency in MHz; (CL× VCC2×fo)= sum of outputs;= output load capacitance in pF;
VCC= supply voltage in Volts. The condition is VI= GNDto VCC.
Philips Semiconductors Product specification
8-input NAND gate 74AHC30; 74AHCT30
FUNCTION TABLESee note1.
Note H= HIGH voltage level;= LOW voltage level;= don’t care.
ORDERING INFORMATION
PINNING
Philips Semiconductors Product specification
8-input NAND gate 74AHC30; 74AHCT30
Philips Semiconductors Product specification
8-input NAND gate 74AHC30; 74AHCT30
RECOMMENDED OPERATING CONDITIONS
LIMITING VALUESIn accordance with the Absolute Maximum Rating System (IEC 134); voltages are referenced to GND (ground=0V).
Notes The input and output voltage ratings may be exceeded if the input and output current ratings are observed. For SO-packages: above 70 °C the value of PD derates linearly with 8 mW/K.
For TSSOP-packages: above 60 °C the value of PD derates linearly with 5.5 mW/K.
Philips Semiconductors Product specification
8-input NAND gate 74AHC30; 74AHCT30
DC CHARACTERISTICS
Family 74AHCOver recommended operating conditions; voltages are referenced to GND (ground=0V).
Philips Semiconductors Product specification
8-input NAND gate 74AHC30; 74AHCT30
Family 74AHCTOver recommended operating conditions; voltages are referenced to GND (ground=0V).
Philips Semiconductors Product specification
8-input NAND gate 74AHC30; 74AHCT30
AC CHARACTERISTICS
Type 74AHC30GND=0 V; tr =tf≤ 3.0 ns.
Notes Typical values at VCC= 3.3V. Typical values at VCC= 5.0V.
Type 74AHCT30GND=0 V; tr =tf≤ 3.0 ns.
Note Typical values at VCC= 5.0V.
