74AHCT1G86GW ,2-input EXCLUSIVE-OR gateFEATURES QUICK REFERENCE DATAGround = 0 V; T =25 °C; t =t ≤ 3.0 ns.amb r f• Symmetrical output impe ..
74AHCT1G86GW ,2-input EXCLUSIVE-OR gateINTEGRATED CIRCUITSDATA SHEET74AHC1G86; 74AHCT1G862-input EXCLUSIVE-OR gateProduct specification 199 ..
74AHCT1G86GW ,2-input EXCLUSIVE-OR gate74AHC1G86; 74AHCT1G862-input EXCLUSIVE-OR gateRev. 05 — 4 July 2007 Product data sheet1.
74AHCT1G86GW ,2-input EXCLUSIVE-OR gateLimiting valuesTable 5.
74AHCT1G86SE-7 , SINGLE 2 INPUT EXCLUSIVE-OR GATE
74AHCT1G86W5-7 , SINGLE 2 INPUT EXCLUSIVE-OR GATE
74HC40103N ,8-bit synchronous binary down counterINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HC40105 ,4-bit x 16-word FIFO registerGENERAL DESCRIPTIONhave buffered outputs. Since all empty locations “bubble”automatically to the in ..
74HC40105 ,4-bit x 16-word FIFO registerINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HC40105 ,4-bit x 16-word FIFO registerFEATURES different shifting rates. This feature makes it particularlyuseful as a buffer between asy ..
74HC40105D ,4-bit x 16-word FIFO registerFeatures and benefits Independent asynchronous inputs and outputs Expandable in either direction ..
74HC40105D ,4-bit x 16-word FIFO registerFEATURES different shifting rates. This feature makes it particularlyuseful as a buffer between asy ..
74AHC1G86GW-74AHCT1G86GW
2-input EXCLUSIVE-OR gate
Philips Semiconductors Product specification
2-input EXCLUSIVE-OR gate 74AHC1G86; 74AHCT1G86
FEATURES Symmetrical output impedance High noise immunity ESD protection:
HBM EIA/JESD22-A114-A
exceeds 2000V EIA/JESD22-A115-A
exceeds 200V Low power dissipation Balanced propagation delays Very small 5-pin package Output capability: standard.
DESCRIPTIONThe 74AHC1G/AHCT1G86 is a
high-speed Si-gate CMOS device.
The 74AHC1G/AHCT1G86 provides
the 2-input EXCLUSIVE-OR function.
QUICK REFERENCE DATAGround=0 V; Tamb =25 °C; tr =tf≤ 3.0 ns.
Notes CPD is used to determine the dynamic power dissipation (PDin μW). =CPD× VCC2×fi +(CL× VCC2× fo) where:= input frequency in MHz;= output frequency in MHz;= output load capacitance in pF;
VCC= supply voltage in Volts. The condition is VI= GNDto VCC.
FUNCTION TABLESee note1.
Note H= HIGH voltage level;= LOW voltage level.
ORDERING INFORMATION
Philips Semiconductors Product specification
2-input EXCLUSIVE-OR gate 74AHC1G86; 74AHCT1G86
PINNING
Philips Semiconductors Product specification
2-input EXCLUSIVE-OR gate 74AHC1G86; 74AHCT1G86
RECOMMENDED OPERATING CONDITIONS
LIMITING VALUESIn accordance with the Absolute Maximum Rating System (IEC 134); voltages are referenced to GND (ground=0V).
Notes The input and output voltage ratings may be exceeded if the input and output current ratings are observed. Above 55 °C the value of PD derates linearly with 2.5 mW/K.
Philips Semiconductors Product specification
2-input EXCLUSIVE-OR gate 74AHC1G86; 74AHCT1G86
DC CHARACTERISTICS
Family 74AHC1GOver recommended operating conditions; voltage are referenced to GND (ground=0 V).
Philips Semiconductors Product specification
2-input EXCLUSIVE-OR gate 74AHC1G86; 74AHCT1G86
Family 74AHCT1GOver recommended operating conditions; voltage are referenced to GND (ground=0 V).
