74AHC377PW ,Octal D-type flip-flop with data enable; positive-edge triggerFEATURES DESCRIPTION• ESD protection: The 74AHC/AHCT377 D-type flip-flops are high-speedHBM EIA/JES ..
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74AHC541BQ ,Octal buffer/line driver; 3-state74AHC541; 74AHCT541Octal buffer/line driver; 3-stateRev. 03 — 12 November 2007 Product data sheet1.
74AHC541D ,Octal buffer/line driver; 3-stateINTEGRATED CIRCUITSDATA SHEET74AHC541; 74AHCT541Octal buffer/line driver; 3-stateProduct specificati ..
74AHC541PW ,Octal buffer/line driver; 3-stateINTEGRATED CIRCUITSDATA SHEET74AHC541; 74AHCT541Octal buffer/line driver; 3-stateProduct specificati ..
74HC373DB ,74HC/HCT373; Octal D-type transparent latch; 3-stateapplications. A latch enable (LE)QUICK REFERENCE DATAGND = 0 V; T =25 °C; t =t = 6 nsamb r fTYPICAL ..
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74HC373DB ,74HC/HCT373; Octal D-type transparent latch; 3-stateLogic diagram (one latch) D0 D1 D2 D3 D4 D5 D6 D7D Q D Q D Q D Q D Q D Q D Q D QLATCH LATCH LATCH L ..
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74HC374 ,3-stateMAXIMUM RATINGSÎÎ Symbol Parameter Value UnitThis device contains protectioncircuitry to guard agai ..
74AHC377PW
Octal D-type flip-flop with data enable; positive-edge trigger
Philips Semiconductors Product specification
Octal D-type flip-flop with data enable;
positive-edge trigger 74AHC377; 74AHCT377
FEATURES ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000V EIA/JESD22-A115-A exceeds 200V
CDM EIA/JESD22-C101 exceeds 1000V Balanced propagation delays All inputs have Schmitt-trigger actions Inputs accept voltages higher than VCC Ideal for addressable register applications Data enable for address and data synchronization Eight positive-edge triggered D-type flip-flops See “273” for master reset version See “373” for transparent latch version See “374” for 3-state version For AHC only: operates with CMOS input levels For AHCT only: operates with TTL input levels Specified from −40to +85 and from −40to +125 °C.
DESCRIPTIONThe 74AHC/AHCT377 D-type flip-flops are high-speed
silicon-gate CMOS devices and are pin compatible with
low power Schottky TTL (LSTTL). They are specified in
compliance with JEDEC standard No. 7A.
The 74AHC/AHCT377 devices have eight edge-triggered,
D-type flip-flops with individual D inputs and Q outputs. common clock (CP) input loads all flip-flops
simultaneously when the data enable (E) is LOW. The
state of each D input, one set-up time before the
LOW-to-HIGH clock transition, is transferred to the
corresponding output (Qn) of the flip-flop.
TheE input mustbe stable only one set-up timepriorto the
LOW-to-HIGH transition for predictable operation.
QUICK REFERENCE DATAGND=0 V; Tamb =25 °C; tr =tf≤ 3.0 ns.
Notes CPD is used to determine the dynamic power dissipation (PDin μW). =CPD× VCC2×fi+∑ (CL× VCC2×fo) where:= input frequency in MHz;= output frequency in MHz; (CL× VCC2×fo)= sum of outputs;= output load capacitance in pF;
VCC= supply voltage in Volts. The condition is VI= GNDto VCC.
Philips Semiconductors Product specification
Octal D-type flip-flop with data enable;
positive-edge trigger 74AHC377; 74AHCT377
FUNCTION TABLESee note1.
Note H= HIGH voltage level;= HIGH voltage level one set-up time prior to the LOW-to-HIGH CP transition;= LOW voltage level;= LOW voltage level one set-up time prior to the LOW-to-HIGH CP transition;= don’t care;= LOW-to-HIGH CP transition.
ORDERING INFORMATION
PINNING
Philips Semiconductors Product specification
Octal D-type flip-flop with data enable;
positive-edge trigger 74AHC377; 74AHCT377
Philips Semiconductors Product specification
Octal D-type flip-flop with data enable;
positive-edge trigger 74AHC377; 74AHCT377
Philips Semiconductors Product specification
Octal D-type flip-flop with data enable;
positive-edge trigger 74AHC377; 74AHCT377
RECOMMENDED OPERATING CONDITIONS
LIMITING VALUES accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referencedto GND (ground=0 V).
Notes The input and output voltage ratings may be exceeded if the input and output current ratings are observed. For SO packages: above 70 °C the value of PD derates linearly by 8 mW/K.
For TSSOP packages: above 60 °C the value of PD derates linearly by 5.5 mW/K.
Philips Semiconductors Product specification
Octal D-type flip-flop with data enable;
positive-edge trigger 74AHC377; 74AHCT377
DC CHARACTERISTICS
74AHC familyWith regard to recommended operating conditions; voltages are referenced to GND (ground=0V).
Philips Semiconductors Product specification
Octal D-type flip-flop with data enable;
positive-edge trigger 74AHC377; 74AHCT377
74AHCT familyWith regard to recommended operating conditions; voltages are referenced to GND (ground=0V).
Philips Semiconductors Product specification
Octal D-type flip-flop with data enable;
positive-edge trigger 74AHC377; 74AHCT377
AC CHARACTERISTICS
Type 74AHC377GND=0 V; tr =tf≤ 3.0 ns.
Philips Semiconductors Product specification
Octal D-type flip-flop with data enable;
positive-edge trigger 74AHC377; 74AHCT377
Type 74AHCT377GND=0 V; tr =tf≤ 3.0 ns.
