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74ACTQ16646MTDFAIN/a680avai16-Bit Transceiver/Register with 3-STATE Outputs
74ACTQ16646MTDXFSCN/a1940avai16-Bit Transceiver/Register with 3-STATE Outputs
74ACTQ16646MTDXFAIRCHILDN/a778avai16-Bit Transceiver/Register with 3-STATE Outputs


74ACTQ16646MTDX ,16-Bit Transceiver/Register with 3-STATE Outputs74ACTQ16646 16-Bit Transceiver/Register with 3-STATE OutputsJune 1991Revised January 199974ACTQ1664 ..
74ACTQ16646MTDX ,16-Bit Transceiver/Register with 3-STATE OutputsFeaturesThe ACTQ16646 contains sixteen non-inverting bidirec- Utilizes Fairchild FACT Quiet Series ..
74ACTQ18823 ,18-Bit D-Type Flip-Flop with 3-STATE Outputsapplications. The device is byte controlled. A buff-

74ACTQ16646MTD-74ACTQ16646MTDX
16-Bit Transceiver/Register with 3-STATE Outputs
74ACTQ16646 16-Bit Transceiver/Register with 3-STATE Outputs June 1991 Revised January 1999 74ACTQ16646 16-Bit Transceiver/Register with 3-STATE Outputs General Description Features The ACTQ16646 contains sixteen non-inverting bidirec- � Utilizes Fairchild FACT Quiet Series technology tional registered bus transceivers providing multiplexed � Guaranteed simultaneous switching noise level and transmission of data directly from the input bus or from the dynamic threshold performance internal storage registers. Each byte has separate control � Guaranteed pin-to-pin output skew inputs which can be shorted together for full 16-bit opera- � Independent registers for A and B buses tion. The DIR inputs determine the direction of data flow through the device. The CPAB and CPBA inputs load data � Multiplexed real-time and stored data transfers into the registers on the LOW-to-HIGH transition. The � Separate control logic for each byte ACTQ16646 utilizes Fairchild Quiet Series technology to � 16-bit version of the ACTQ646 guarantee quiet output switching and improved dynamic � Outputs source/sink 24 mA threshold performance. FACT Quiet Series features � Additional specs for Multiple Output Switching GTO output control and undershoot corrector for superior performance. � Output loading specs for both 50 pF and 250 pF loads Ordering Code: Order Number Package Number Package Description 74ACTQ16646SSC MS56A 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide 74ACTQ16646MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol Connection Diagram Pin Assignment for SSOP and TSSOP FACT, Quiet Series, FACT Quiet Series and GTO are trademarks of . © 1999 DS010937.prf
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