74ACT2708PC ,64 x 9 First-In/ First-Out MemoryApplications• High-speed disk or tape controllers • A/D output buffers• High-speed graphics pixel b ..
74ACT273 ,Octal D-Type Flip-Floplogic diagram has not be used to estimate propagation delays2/1174ACT273
74ACT273M ,OCTAL D-TYPE FLIP FLOP WITH CLEARABSOLUTE MAXIMUM RATINGS Symbol Parameter Value UnitV Supply Voltage-0.5 to +7 VCCV DC Input V ..
74ACT273MTC ,Octal D-Type Flip-Flopapplications where the true output onlyis required and the Clock and Master Reset are common toall ..
74ACT273MTCX ,Octal D-Type Flip-FlopFeaturesThe AC273 and ACT273 have eight edge-triggered D-type
74ACT2708PC
64 x 9 First-In/ First-Out Memory
74ACT2708 64 x 9 First-In, First-Out Memory February 1989 Revised January 1999 74ACT2708 64 x 9 First-In, First-Out Memory General Description Features The ACT2708 is an expandable first-in, first-out memory � 64-words by 9-bit dual port RAM organization organized as 64 words by 9 bits. An 85 MHz shift-in and 60 � 85 MHz shift-in, 60 MHz shift-out data rate, typical MHz shift-out typical data rate makes it ideal for high-speed � Expandable in word width only applications. It uses a dual port RAM architecture with � TTL-compatible inputs pointer logic to achieve the high speed with negligible fall- � Asynchronous or synchronous operation through time. Separate Shift-In (SI) and Shift-Out (SO) clocks control the � Asynchronous master reset use of synchronous or asynchronous write or read. Other � Outputs source/sink 8 mA controls include a Master Reset (MR) and Output Enable � 3-STATE outputs (OE) for initializing the internal registers and allowing the � Full ESD protection data outputs to be 3-STATE. Input Ready (IR) and Output � Input and output pins directly in line for easy board lay- Ready (OR) signal when the FIFO is ready for I/O opera- out tions. The status flags HF and FULL indicate when the FIFO is full, empty or half full. � TRW 1030 work-alike operation The FIFO can be expanded to provide different word lengths by tying off unused data inputs. Applications • High-speed disk or tape controllers • A/D output buffers • High-speed graphics pixel buffer • Video time base correction • Digital filtering Ordering Code: Order Number Package Number Package Description 74ACT2708PC N28B 28-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.600” Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Connection Diagram Pin Descriptions Pin Assignment for DIP Pin Names Description D –D Data Inputs 0 8 MR Master Reset OE Output Enable Input SI Shift-In SO Shift-Out IR Input Ready OR Output Ready HF Half Full Flag FULL Full Flag O –O Data Outputs 0 8 FACT is a trademark of . © 1999 DS010144.prf
