74ACT16825DL ,18-Bit Buffers/Drivers With 3-State Outputs 54ACT16825, 74ACT16825 18-BIT BUFFERS/DRIVERSWITH 3-STATE OUTPUTSSCAS155B – JANUARY 1991 – REVISED ..
74ACT16841 ,20-Bit Bus-Interface D-Type Latches With 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
74ACT16841DL ,20-Bit Bus-Interface D-Type Latches With 3-State Outputs 54ACT16841, 74ACT16841 20-BIT BUS-INTERFACE D-TYPE LATCHESWITH 3-STATE OUTPUTSSCAS174A – MAY 1991 ..
74ACT16841DLR , 20-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS
74ACT16863DL ,18-Bit Bus Transceivers With 3-State Outputs 54ACT16863, 74ACT16863 18-BIT BUS TRANSCEIVERSWITH 3-STATE OUTPUTSSCAS162B – JUNE 1990 – REVISED N ..
74ACT16863DLR , 18-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
74HC174N ,Hex D-type flip-flop with reset; positive-edge triggerPin configuration DIP16 Fig 5.
74HC174PW ,Hex D-type flip-flop with reset; positive-edge triggerINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HC175D ,Quad D-type flip-flop with reset; positive-edge triggerINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HC175DB ,Quad D-type flip-flop with reset; positive-edge triggerGENERAL DESCRIPTIONcorresponding output (Q ) of the flip-flop.nThe 74HC/HCT175 are high-speed Si-ga ..
74HC175N ,Quad D-type flip-flop with reset; positive-edge triggerFeatures and benefits Input levels: For 74HC175: CMOS level For 74HCT175: TTL level Four edge-t ..
74HC175N ,Quad D-type flip-flop with reset; positive-edge triggerapplications where both the truestandard no. 7A.and complement outputs are required and the clock a ..
74ACT16825DL
18-Bit Buffers/Drivers With 3-State Outputs
Parity Flow-Through Architecture Optimizes
PCB Layout Distributed VCC and GND Pin Configuration
Minimizes High-Speed Switching Noise EPIC (Enhanced-Performance Implanted
CMOS) 1-m m Process Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) Packages Using
25-mil Center-to-Center Pin Spacings and
380-mil Fine-Pitch Ceramic Flat (WD)
Packages Using 25-mil Center-to-Center
Spacings
descriptionThe ’ACT16825 18-bit buffers/drivers are
designed specifically to improve both the
performance and density of 3-state memory
address drivers, clock drivers, and bus-oriented
receivers and transmitters.
The ’ACT16825 can be used as two 9-bit buffers
or one 18-bit buffer. They provide true data from
A to Y.
The 3-state control gate is a 2-input NOR gate;
therefore, if either output-enable (OE1 or OE2)
input is high, all nine affected outputs are in the
high-impedance state.
The 74ACT16825 is packaged in TI’s shrink small-outline package, which provides twice the I/O pin count and
functionality of standard small-outline packages in the same printed-circuit-board area.
The 54ACT16825 is characterized for operation over the full military temperature range of –55°C to 125°C. The
74ACT16825 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each 9-bit section)Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1Y1
1Y2
GND
1Y3
1Y4CC
1Y5
1Y6
1Y7
GND
1Y8
1Y9
GND
GND
2Y1
2Y2
GND
2Y3
2Y4
2Y5
VCC
2Y6
2Y7
GND
2Y8
2Y9
2OE1
1A1
1A2
GND
1A3
1A4CC
1A5
1A6
1A7
GND
1A8
1A9
GND
GND
2A1
2A2
GND
2A3
2A4
2A5
VCC
2A6
2A7
GND
2A8
2A9
2OE2
