74ACT16373DLR ,16-Bit D-Type Transparent Latches With 3-State Outputslogic diagram (positive logic)1 241OE 2OE25482C1CC1C12 132Q11Q147 361D2D11D1 1DTo Seven Other Chann ..
74ACT16373DLRG4 ,16-Bit D-Type Transparent Latches With 3-State Outputs 48-SSOP -40 to 85maximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
74ACT16373MTD ,16-Bit Transparent Latch with 3-STATE OutputsFunctional Description Truth TablesThe ACT16373 contains sixteen D-type latches with 3- Inputs Outp ..
74ACT16373MTDX ,16-Bit Transparent Latch with 3-STATE OutputsFeaturesThe ACT16373 contains sixteen non-inverting latches with
74ACT16373-74ACT16373DL-74ACT16373DLR-74ACT16373DLRG4
16-Bit D-Type Transparent Latches With 3-State Outputs
SN54ACT16373, 74ACT16373
16-BIT D-TYPE TRANSPARENT LATCHES
WITH 3-STATE OUTPUTS
SCAS122C − MARCH 1990 − REVISED SEPTEMBER 1996
Members of the Texas Instruments
Widebus� Family Inputs Are TTL-Voltage Compatible 3-State Bus Driving True Outputs Full Parallel Access for Loading Flow-Through Architecture Optimizes
PCB Layout Distributed VCC and GND Pin Configuration
Minimizes High-Speed Switching Noise EPIC� (Enhanced-Performance Implanted
CMOS) 1-�m Process 500-mA Typical Latch-Up Immunity at
125°C Package Options Include Shrink
Small-Outline (DL) 300-mil Packages Using
25-mil Center-to-Center Pin Spacings and
380-mil Fine-Pitch Ceramic Flat (WD)
Packages Using 25-mil Center-to-Center
Pin Spacings
descriptionThe SN54ACT16373 and 74ACT16373 are 16-bit
D-type transparent latches with 3-state outputs
designed specifically for driving highly capacitive
or relatively low-impedance loads. They are
particularly suitable for implementing buffer
registers, I/O ports, bidirectional bus drivers, and
working registers. These devices can be used as
two 8-bit latches or one 16-bit latch. The Q outputs
of the latches follow the data (D) inputs if enable
C is taken high. When C is taken low, the Q outputs
are latched at the levels set up at the D inputs.
A buffered output-enable (OE) input can be used to place the outputs in either a normal logic state (high or low
logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the
bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines
in a bus-organized system without need for interface or pullup components.
OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
The 74ACT16373 is packaged in TI’s shrink small-outline package, which provides twice the I/O pin count and
functionality of standard small-outline packages in the same printed-circuit-board area.
The SN54ACT16373 is characterized for operation over the full military temperature range of −55°C to 125°C.
The 74ACT16373 is characterized for operation from −40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1OE
1Q1
1Q2
GND
1Q3
1Q4
VCC
1Q5
1Q6
GND
1Q7
1Q8
2Q1
2Q2
GND
2Q3
2Q4
VCC
2Q5
2Q6
GND
2Q7
2Q8
2OE
1D1
1D2
GND
1D3
1D4
VCC
1D5
1D6
GND
1D7
1D8
2D1
2D2
GND
2D3
2D4
VCC
2D5
2D6
GND
2D7
2D8
SN54ACT16373... WD PACKAGE
74ACT16373... DL PACKAGE
(TOP VIEW)
