74ACT14 ,Hex Inverter with Schmitt Trigger InputFeaturesThe 74AC14 and 74ACT14 contain six inverter gates each
74ACT14
Hex Inverter with Schmitt Trigger Input
74AC14 • 74ACT14 Hex Inverter with Schmitt Trigger Input November 1988 Revised December 1999 74AC14 74ACT14 Hex Inverter with Schmitt Trigger Input General Description Features The 74AC14 and 74ACT14 contain six inverter gates eachI reduced by 50% CC with a Schmitt trigger input. They are capable of transform- Outputs source/sink 24 mA ing slowly changing input signals into sharply defined, jitter- 74ACT14 has TTL-compatible inputs free output signals. In addition, they have a greater noise margin than conventional inverters. The 74AC14 and 74ACT14 have hysteresis between the positive-going and negative-going input thresholds (typi- cally 1.0V) which is determined internally by transistor ratios and is essentially insensitive to temperature and sup- ply voltage variations. Ordering Code: Order Number Package Number Package Description 74AC14SC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body 74AC14SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74AC14MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MS-153, 4.4mm Wide 74AC14PC N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide 74ACT14SC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body 74ACT14MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MS-153, 4.4mm Wide 74ACT14PC N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol Connection Diagram IEEE/IEC Function Table Pin Descriptions Input Output Pin Names Description AO I Inputs n LH O Outputs n HL FACT is a trademark of . © 1999 DS009917
