74ABT373 ,Octal Transparent Latch with 3-STATE OutputsFunctional Description Truth TableThe ABT373 contains eight D-type latches with 3-STATEInputs Outpu ..
74ABT373AD ,Octal transparent latch (3-State)PIN CONFIGURATION PIN DESCRIPTIONPIN NUMBER SYMBOL FUNCTION1 OE Output enable input (active-Low)OE ..
74ABT373AD ,Octal transparent latch (3-State)PIN CONFIGURATION PIN DESCRIPTIONPIN NUMBER SYMBOL FUNCTION1 OE Output enable input (active-Low)OE ..
74ABT373ADB ,Octal transparent latch 3-StateINTEGRATED CIRCUITS74ABT373AOctal transparent latch (3-State)Product specification 1995 Feb 17IC23 ..
74ABT373APW ,Octal transparent latch (3-State)FEATURES DESCRIPTIONThe 74ABT373A high-performance BiCMOS device combines low• 8-bit transparent l ..
74ABT373CMSA ,Octal Transparent Latch with 3-STATE Outputsapplications. The flip-flops
74ABT373
Octal Transparent Latch with 3-STATE Outputs
74ABT373 Octal Transparent Latch with 3-STATE Outputs January 1993 Revised November 1999 74ABT373 Octal Transparent Latch with 3-STATE Outputs General Description Features The ABT373 consists of eight latches with 3-STATE out-3-STATE outputs for bus interfacing puts for bus organized system applications. The flip-flopsOutput sink capability of 64 mA, source capability of appear transparent to the data when Latch Enable (LE) is 32 mA HIGH. When LE is LOW, the data that meets the setup Guaranteed output skew times is latched. Data appears on the bus when the Output Guaranteed multiple output switching specifications Enable (OE) is LOW. When OE is HIGH the bus output is in Output switching specified for both 50 pF and 250 pF the high impedance state. loads Guaranteed simultaneous switching, noise level and dynamic threshold performance Guaranteed latchup protection High impedance glitch free bus loading during entire power up and power down Nondestructive hot insertion capability Ordering Code: Order Number Package Number Package Description 74ABT373CSC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body 74ABT373CSJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74ABT373CMSA MSA20 20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide 74ABT373CMTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74ABT373CPC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Connection Diagram Pin Descriptions Pin Names Description D –D Data Inputs 0 7 LE Latch Enable Input (Active HIGH) OE Output Enable Input (Active LOW) O –O 3-STATE Latch Outputs 0 7 © 1999 DS011547
