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74ABT273ADPHIN/a4000avaiOctal D-type flip-flop
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74ABT273AD-74ABT273ADB-74ABT273AN-74ABT273APW
Octal D-type flip-flop
Product specification 1995 Sep 06
IC23 Data Handbook
Philips Semiconductors Product specification
74ABT273AOctal D-type flip-flop
FEATURES
Eight edge-triggered D-type flip-flops Buffered common clock Buffered asynchronous Master Reset Power-up reset See 74ABT377 for clock enable version See 74ABT373 for transparent latch version See 74ABT374 for 3-State version ESD protection exceeds 2000 V per Mil Std 833 Method 3015 and
200 V per machine model.
DESCRIPTION

The 74ABT273A has eight edge-triggered D-type flip-flops with
individual D inputs and Q outputs. The common buffered Clock (CP)
and Master Reset (MR) inputs load and reset (clear) all flip-flops
simultaneously.
The register is fully edge-triggered. The state of each D input, one
setup time before the Low-to-High clock transition, is transferred to
the corresponding flip-flop’s Q output.
All outputs will be forced Low independent of Clock or Data inputs
by a Low voltage level on the MR input. The device is useful for
applications where the true output only is required and the CP and
MR are common elements.
QUICK REFERENCE DATA
ORDERING INFORMATION
PIN CONFIGURATION
PIN DESCRIPTION
Philips Semiconductors Product specification
74ABT273AOctal D-type flip-flop
LOGIC SYMBOL (IEEE/IEC)
LOGIC SYMBOL
LOGIC DIAGRAM
FUNCTION TABLE
= High voltage level= High voltage level one set-up time prior to the Low-to-High
clock transition= Low voltage level = Low voltage level one set-up time prior to the Low-to-High
clock transition= Don’t care= Low-to-High clock transition
Philips Semiconductors Product specification
74ABT273AOctal D-type flip-flop
ABSOLUTE MAXIMUM RATINGS1, 2
NOTES:
Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
Philips Semiconductors Product specification
74ABT273AOctal D-type flip-flop
DC ELECTRICAL CHARACTERISTICS
NOTES:
Not more than one output should be tested at a time, and the duration of the test should not exceed one second. This is the increase in supply current for each input at 3.4V. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
AC CHARACTERISTICS

GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500Ω
Philips Semiconductors Product specification
74ABT273AOctal D-type flip-flop
AC SETUP REQUIREMENTS

GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500Ω
AC WAVEFORMS

VM = 1.5V, VIN = GND to 3.0V
The shaded areas indicate when the input is permitted to change for predictable output performance.
Waveform 1. Propagation Delay, Clock Input to Output, Clock
Pulse Width, and Maximum Clock Frequency
Waveform 2. Master Reset Pulse Width, Master Reset to Output
Delay and Master Reset to Clock Recovery Time
Waveform 3. Data Setup and Hold Times
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