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100EL11N/a80avai5V ECL 1:2 Differential Fanout Buffer


100EL11 ,5V ECL 1:2 Differential Fanout BufferFeaturesThe 100EL11 is a 5V 1:2 differential fanout buffer. One dif-

100EL11
5V ECL 1:2 Differential Fanout Buffer
100EL11 5V ECL 1:2 Differential Fanout Buffer January 2003 Revised January 2003 100EL11 5V ECL 1:2 Differential Fanout Buffer General Description Features The 100EL11 is a 5V 1:2 differential fanout buffer. One dif-Typical propagation delay of 265 ps ferential input signal is fanned out to two identical differen-Typical I of 26 mA EE tial outputs. By supplying a constant reference level to one Typical Skew of 5 ps between outputs input pin a single ended input condition is created. Internal pull-down resistors on inputs With inputs open or both inputs at V the differential Q EE Fairchild MSOP-8 package is a drop-in replacement to outputs default LOW and Q outputs default HIGH. ON TSSOP-8 The 100 series is temperature compensated. Meets or exceeds JEDEC specification EIA/JESD78 IC latch-up test Moisture Sensitivity Level 1 ESD Performance: Human Body Model > 2000V Machine Model > 200V Ordering Code: Product Order Number Package Code Package Description Number Top Mark 100EL11M M08A KEL11 8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 100EL11M8 MA08D KL11 8-Lead Molded Small Outline Package (MSOP), JEDEC MO-187, 3.0mm Wide (Preliminary) Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Connection Diagram Logic Diagram Top View Pin Descriptions Pin Name Description Q , Q , Q , Q ECL Data Outputs 0 0 1 1 D, D ECL Data Inputs V Positive Supply CC V Negative Supply EE © 2003 DS500769
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