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100341DCNSCN/a2avai Low Power 8-Bit Shift Register
100341DCNSN/a645avai Low Power 8-Bit Shift Register


100341DC , Low Power 8-Bit Shift RegisterFeaturesThe 100341 contains eight edge-triggered, D-type flip-flops

100341DC
Low Power 8-Bit Shift Register
100341 Low Power 8-Bit Shift Register July 1988 Revised August 2000 100341 Low Power 8-Bit Shift Register General Description Features The 100341 contains eight edge-triggered, D-type flip-flops35% power reduction of the 100141 with individual inputs (P ) and outputs (Q ) for parallel n n2000V ESD protection operation, and with serial inputs (D ) and steering logic for nPin/function compatible with 100141 bidirectional shifting. The flip-flops accept input data a Voltage compensated operating range = −4.2V to −5.7V setup time before the positive-going transition of the clock Available to industrial grade temperature range pulse and their outputs respond a propagation delay after this rising clock edge. The circuit operating mode is determined by the Select inputs S and S , which are internally decoded to select 0 1 either “parallel entry”, “hold”, “shift left” or “shift right” as described in the Truth Table. All inputs have 50 kΩ pull- down resistors. Ordering Code: Order Number Package Number Package Description 10034SC M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 100341PC N24E 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide 100341QI V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square 100341QC V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square Industrial Temperature Range (−40°C to +85°C) Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Connection Diagrams 24-Pin DIP/SOIC Pin Descriptions Pin Names Description 28-Pin PLCC CP Clock Input S , S Select Inputs 0 1 D , D Serial Inputs 0 7 P –P Parallel Inputs 0 7 Q –Q Data Outputs 0 7 © 2000 DS009880
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