IC Phoenix
 
Home ›  TT18 > TC9320F,Frequency Counter System Microcontroller (DTS-10)
TC9320F Fast Delivery,Good Price
Part Number:
If you need More Quantity or Better Price,Welcom Any inquiry.
We available via phone +865332716050 Email
Partno Mfg Dc Qty AvailableDescript
TC9320FTOSHIBAN/a85avaiFrequency Counter System Microcontroller (DTS-10)


TC9320F ,Frequency Counter System Microcontroller (DTS-10)
TC9320F-001 ,DDTS-1: DIGITAL TUNER SYSTEM
TC9322FB ,SINGLE CHIP DTS MICROCONTROLLER (DTS-21)features a built-in prescaler of operating 230MHz, PLLand LCD drivers.The CPU has 4bit parallel add ..
TC9322FB ,SINGLE CHIP DTS MICROCONTROLLER (DTS-21)Features built-in 1/3-duty, 1/2-bias LCD drivers and a built-in 3V booster circuit for the display. ..
TC9327AF ,DTS Microcontroller (DTS-21)Features a built-in 3-channel, 6-bit A/D converter. To prevent CPU malfunction, a built-in supply v ..
TC9327F ,DTS MICROCONTROLLERTC9327FT(‘QR77FDTS MICROCONTROLLER (DTS-21)The TC9327F is a 4-bit CMOS microcontroller forsingle-ch ..
TDA7463A ,LOW VOLTAGE TONE CONTROL DIGITALLY CONTROLLED AUDIO PROCESSORapplications inamplifiers.Low voltage supply portable systems.Thanks to the used BIPOLAR/CMOS Techn ..
TDA7463A ,LOW VOLTAGE TONE CONTROL DIGITALLY CONTROLLED AUDIO PROCESSORABSOLUTE MAXIMUM RATINGSSymbol Parameter Value UnitV Operating Supply Voltage 5 VST Operating Ambie ..
TDA7463AD ,LOW VOLTAGE TONE CONTROL DIGITALLY CONTROLLED AUDIO PROCESSORBlock DiagramR55.6KC14 3.3nF 100nF 100nFC13 C12TREBLE-R BASSI-R BASSO-R17 16 15C1 0.47µFRB18IN2-RIN ..
TDA7463D ,LOW VOLTAGE TONE CONTROL DIGITALLY CONTROLLED AUDIO P CANCELLERTDA7463D®LOW VOLTAGE TONE CONTROLDIGITALLY CONTROLLED AUDIO PROCESSOR1 STEREO INPUT1 STEREO OUTPUTT ..
TDA7463D ,LOW VOLTAGE TONE CONTROL DIGITALLY CONTROLLED AUDIO P CANCELLERABSOLUTE MAXIMUM RATINGSSymbol Parameter Value UnitV Operating Supply Voltage 5 VST Operating Ambie ..
TDA7463D ,LOW VOLTAGE TONE CONTROL DIGITALLY CONTROLLED AUDIO P CANCELLERapplications in Lowworks and switches combined with operationalvoltage supply portable systems.ampl ..


TC9320F
Frequency Counter System Microcontroller (DTS-10)
TOSHIBA TC9320F
TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC
TC9320F
Frequency Counter System Microcontroller (DTS-10)
The TC9320F is a 4bit CMOS microcontroller for
frequency counter system with LCD driver.
The CPU has 4bit parallel addition/subtraction (AI, SI
instructions, etc.) logical operation (OR, AN instructions,
etc.) multiple bits judgment, comparison instructions (TM,
SL instructions, etc.) and time base functions. The
TC9320F is housed in an 60 pin mini-flat package and is
provided with ample I/O ports and exclusive key input
ports which are controlled by powerful I/O instructions
(IO, KEY instruction, etc.) and 1/2 duty and 1/2 bias
driving ample LCD use exclusive output terminals. QFP60-P-1414-0.80E
Furthermore, the TC9320F has built in serial bus control Weight : 0.85g (Typ.)
function (SIO instruction) to powerfully control peripheral
ICs, 6bit A/D converter and D/A converter that are usable for field strength measurement and
electronic volume control, and provides with many functions needed for frequency counter system.
FEATURES
It 4 bit microcontroller frequency counter system
0 5V i 10% single power supply, CMOS structure for low power dissipation.
o Built-in LCD driver (1 /2 duty, 1/2 bias, frame frequency : 100 Hz, 50 segments (Max.))
0 Easy back up of data memory (RAM) and various ports (by the IN-H terminal).
0 Program memory (ROM) .' 16 bits x 2048 steps
It Data memory (RAM) : 4 bits x 192 words
a 61 kinds of powerful instructions sets (all single word instructions)
1 2001-06-19
TOSHIBA TC9320F
0 Instruction execution time 11.1ps (3.6 MHz or 7.2 MHz or 10.8 MHz crystal connection)
0 Abundant add and subtract instructions (Add instruction : 12, subtract instruction : 12)
It Powerful composite judging instructions (TMTR, TMFR, TMT, TMF instructions, etc.)
It Data transfer at the same row address is possible.
0 Register indirect transfer is possible (MVGD, MVGS instructions)
0 Powerful 16 general registers (arranged in RAM)
It Stack level : 2 levels
It Program memory (ROM) has no conception of page and field, and JUMP and CAL instructions can
be freely contained in 2048 steps.
Further, contents of 16 bits data at any address in 1024 steps can be freely referred (DAL
instruction)
0 Built-in 20 bit general-use frequency counter (FMIN, AMIN)
It Independent frequency input terminals for FM and AM (FMIN, AMIN)
o 3 crystal oscillation frequencies are programmatically selectable. (3.6 MHz, 7.2 MHz, 10.8 MHz)
0 Built-in powerful serial bus control function (I/O port-2 terminals are programmatically selectable.)
It Powerful l/O instructions (IO, KEY, SIO instruction, etc.)
It Exclusive key input port (K0~K3), abundant 25 (Max.) terminals LCD driver.
0 Max. 27 I/O ports (I/O settable ports : 12 (Max.) output port : 8 (Max.) input port : 7 (Max.))
0 Clock stop is possible programmatically (at CKSTP instruction : supply current below 10pA)
o Built-in 2 Hz timer F/F, 10/100 Hz internal pulse output (Internal port for time base)
It LCD driver Terminal (S21--S25) and HG port (P1-1~P1-4, P4-1) are programmatically selectable.
0 Built-in 6 bit A/D and D/A converters (Selectable by selecting l/O port-3 terminals (P3-1--P3-3)
programmatically).
0 OTP product : TC93P20F
2 2001-06-19
TOSHIBA TC9320F
PIN CONNECTION
cty.rr
-osercvQQ
mmUWD<<
\\\\\\\
F-s-tNm''.-.:.,
rNICEi-usiiiiii,
alalarMrNtNrMr'urntntYTuytft_rtY0
- '-rLtutLtLtLtLa.r-r-r-r-
"E_rE_IE_.I_II_rE_IE_IE_IE_.E_IE_r"
IN1 I 30 I T2
T7 IIO PORTS 29 " T1
NC 28 I TO
GND2 - 27I K3
FMIN % g 26I K2
AMIN 8 , 25 I K1
VDD Sd 24' K0
GND1 TOP VIEW QFP-SOPIN 23 I NC
XT 22 I COMI
rr, I55 21 I S25/P4-1
2tmS24/Pl-4
19 I S23/P1-3
18V S22/P1-2
I/O PORTS
17 l S21 /P1-1
S3 LCD DRIVER OUTPUT (27)
5 6 7 8 9
- t l I t - l
m o '" N m 'ct In
as F F F F F F
vs vs m m m m
3 2001-06-19
TOSHIBA
TC9320F
BLOCK DIAGRAM
10 Hz 50 Hz 100 HzWait
2Hz F/F
System Reset Power on Reset VDD
Wait Wait Detector
CPU Timing Gene
3.6/7.2 /
10.8 MHz
Divider OSC
20 bit General
HF(L_F)
FM/FMH
DATA BUS
CODE BUS
(16 x 2048
Data Reg (16b i 1)
Addr. Dec.
Prog. Counter
Stack Reg.
LCD COM
COM1COM2
Purpose
Counter
General IN
Purpose
Counter
Control
COLUMN Comparator
(4 x 192
AID, D/A Conv
P3-3/ADlN2
IDAOUT
P3-2/AD|N1
P3-1/DC'REF
AddLDec
R/W Buf
Shift Reg.
510 CONT.
Instruction
P2-4/STB
P2-3 /CK
P2-2 ISO
P2-1 ISI
50 Hz 100 Hz T0
LCD Segment La.
LCD Driver
SI 2 3 4 5 6 7 8 910111213141516171819202/12/22/32/42/5
P,1P,1P,1P,1P,4
12 3 41
2001 -06-1 9
TOSHIBA
PIN DESCRIPTION
TC9320F
SYMBOL
PIN NAME
FUNCTION AND OPERATION
REMARKS
LCD Common
Output
Common signal output terminals to LCD.
Maximum 50 segments can be displayed in a
matrix with S1~525.
Three levels of VDD, 1/2 VDD and GND are
output to these terminals in a 50Hz cycle at
intervals of 5ms.
(Note) : At time of system reset and
execution of CKSTP and DISP OFF,
output is automatically fixed at "L"
level.
SS~SZO
$21/P1-1
S25/P4-1
LCD Segment
Output
LCD Segment
Output
/l/O port 1, 4
Segment signal output terminals to LCD.
Maximum 50 segments can be displayed in a
matrix with COM1 and COM2.
Data are output to these terminals by
executing SEG instruction (COM1 system) and
MARK instruction (COM2 system).
As to segment decoding, it is possible to
perform it by creating its decoding pattern in
ROM area and using DAL command.
S21/P1-1--S25/P4-1 can be used both as 5bit
I/O port and segment output.
Assignment to I/O port is executed by
contents of internal port called TERMINAL
CONTROL.
I/O designation for every bit can be made
for these ports, In case of using I/O port, it
can be assigned to input or output for each
bit by program.
There designate is executed by contents of
internal port call PART-1, PORT-4 I/O
CONTROL.
(Note) : At time of system reset and
execution of CKSTP command and
DISP OFF, output is automatically
fixed at "L" level.
(Refer to Note 3.)
No Connection
This terminal must be left open.
In case of OTP product TC93P20F, this
terminal serves as Vpp terminal.
2001 -06-1 9
TOSHIBA
TC9320F
PIN SYMBOL
PIN NAME
FUNCTION AND OPERATION
REMARKS
24--27 Ko-- K3
Key Input Port
4bit input ports for key matrix input.
When KEY instruction these ports specified in
the operand is executed, data of these
terminals are read in RAM.
All terminals have built in pull-down resistors.
Further, the output ports T0--T6 are normally
used for key return timing signal.
28--34 T0~T6
Key Timing
Output Port
4bit (T0--T3), 3 bit (T4-T6) and 1 bit (T7)
output terminals.
T0~T6 ports are normally used for key return
timing signal output of key matrix.
(Refer to Notes 2 and 3.)
35 P3-3
/ADIN2
/DA0UT
36 P3-2
/ADIN1
37 P3-1
/DC-REF
I/O Port 3
/AD Analog
Voltage Input
/DA Analog
Voltage Output
/DA Analog
Voltage Input
/Reference
Voltage Input
3 bit I/O ports.
I/O designation for every bit can be made
for these ports.
This designation is made according to
contents of the internal port called PORT-3
I/O CONTROL.
Further, these terminals also serve for the
analog input of the built-in 2 channel A/D
converter and analog output of I-channel D/
A converter.
A/D and D/A converter input/output
selection is controlled according to contents
of ADON, DAON or ADSEL bit.
The built-in A/D converter is of
programmably sequential comparison type,
and P3-1 is the reference voltage input, P3-2
is the analog comparison voltage input, and
P3-3 is the analog comparison voltage input
or analog voltage output.
(Note) : A ladder resistance that generates
internal D/A reference voltage is
used commonly by the A/D and D/
A converters.
When both the A/D and D/A
converters are used simultaneously,
DAON bit is set to "0" and D/A
output is made to high impedance
at time of A/D conversion.
It is therefore necessary to hold
potential with a capacitor, etc.
(Refer to Notes l, 2 and 3.)
To AD or DA
converter
2001 -06-1 9
TOSHIBA TC9320F
Il). SYMBOL PIN NAME FUNCTION AND OPERATION REMARKS
4bit I/O ports.
I/O designation for every bit can be made
for these ports.
P2-4/STB I/O Port 2 This designation is made according to
/Strobe Pulse contents of the internal port called PORT-2
Output I/O CONTROL. VDD
38-- P2-3/CK /Serial Clock Further, these terminals are also used as the
41 Output serial interface (SIO). _
P2-2/SO /Serial Data Selection of SIO is controlled according to '-
Output contents of SIO ON bit and in case of these
P2-1/Sl /Serial Data serial interface, peripheral optional ICs can be
Input controlled by executing SIO command. Serial
transfer in NCD mode is programmably
selectable.
(Refer to Notes 1, 2 and 3.)
Test mode control input terminal.
The device is put in the test mode when "H"
Test Mode level signal is input and becomes the normal
42 TEST . " " . . .
Control Input operating state when L level signal IS input
or in NC state. RIN2
(A pull-down resistor has been built in.)
Device system reset signal input terminal.
As long as the W terminal is kept at "L"
level, a system is kept in the reset state and V
when it becomes "H" level, a program startes DD
- . . . from address 0.
43 I I Initialize Input Normally, the system is reset when 0-3.5V is O_E
supplied to the VDD terminal (Power ON
Reset) and therefore, this terminal is used by
fixing at "H" level.
(Refer to Notes 1 and 3.)
2001 -06-1 9
TOSHIBA
TC9320F
SYMBOL
PIN NAME
FUNCTION AND OPERATION
REMARKS
Inhibit Input
Terminal
This is the INH port input terminal.
Normally, this terminal is used for radio mode
selecting signal input or battery detection
signal input.
When CKSTP instruction is used in a program
and this CKSTP instruction is executed while
the W terminal is at "L'' level, it is possible
to stop the internal clock generator and CPU
operation and put a system in the memory
backup state with low current consumption
(below 10PA).
(Note) : CKSTP instruction is effective when
the W terminal is at "L" level and
when this instruction is executed at
"H" level, the same operation as
NOOP instruction results.
(Note) : In the radio OFF mode or back-up
mode, it is necessary to set reference
internal ports (4 bits) at all "1"
(Radio OFF mode).
Input Port 2
Input Port 1
These terminals are input ports.
No Connection
This terminal must be left open.
Analog GND
Terminal
GND terminal only for frequency counter and
AD/DA converter analog units.
FM Band Signal
This is an input terminal for FM band.
The FMH mode and FML mode are selectable
by Radio instruction.
In case of FML mode, local oscillation output
(VCO output) of 30 to 140 MHz (0.3 Vp-p Min.)
is input and in case of FMH mode, 30 to
185MHz (0.5 Vp-p Min.) is input.
Having a built-in input amplifier, operates at
small amplitude with a capacitor connected.
2001 -06-1 9
TOSHIBA
TC9320F
PIN SYMBOL
PIN NAME
FUNCTION AND OPERATION
REMARKS
51 AMIN
AM Band Signal
This is an input terminal for AM band.
The LF mode and HF mode are selectable by
Radio instruction.
In case of LF mode, local oscillation output
(VCO output) of 0.5 to 20 MHz (0.3 Vp-p Min.)
and HF mode, 1 to 40 MHz (0.3 Vp-p Min.) is
input.
Having a built-in input amplifier, operates at
small amplitude with a capacitor connected.
(Note) : When reference internal ports
(4 bits) are set at all "1" or FMH
Mode or FML Mode is set, this input
is pulled down.
52 VDD
Power Supply
Terminal
Power supply terminal.
At time of Rakio operation, 5V , 10% is
applied.
In the back-up state (when executing CKSTP
instruction), voltage can be reduced to 2V.
Further, when voltage drops below 3.5V
during the operation of CPU, CPU stops (CPU
Wait Mode) to prevent malfunction it restarts
when voltage increases above 3.5 V.
As (Wait Mode) resulted under this condition
can be detected by Wait F/F bit, perform
initialization, clock correction, etc.
programmatically.
Further, when 0 to 3.5V is applied to this
terminal, a device is reset and a program
starts from address 0 (power On Reset).
(Note) : Rise time of supply voltage on a
device shall be 10--100 ms for the
power ON reset operation.
(Refer to Note 1)
53 GND1
Digital GND
Terminal
GND terminal for CPU and the logic unit.
2001 -06-1 9
TOSHIBA TC9320F
m“ SYMBOL PIN NAME FUNCTION AND OPERATION REMARKS
Crystal resonator connecting terminal. XTC)-
It can be selectable Crystal resonator among Rf2 -
3.6 MHz, 7.2 MHz, 10.8 MHz. VDD
4 X I . . . .
5 T f:irsyci1aaltion Adjust oscillation frequency (7.2 MHz) while
55 Fr Terminal observing LCD segment waveform. XT -
T When CKSTP instruction is executed.
oscillation stops automatically. -'
(Refer to Note 1)
(Note 1) : When a device is reset (VDD = 0-y3.5V and Tuf = "L"-y"H'0, I/O ports are set
to the input, terminals serving as I/O ports and AD/DA converters are to the
input of HO ports, terminals serving as l/O ports and serial I/O ports are set to
the input of I/O ports.
Crystal oscillation signal is designated to 10.8 MHz.
(Note 2) : When CKSTP instruction is executed, outputs of the output ports and I/O ports
are all set at "L" level.
(Note 3) .' When a device is reset, contents of output ports and internal ports are indefinite
and it is therefore necessary to initialize them programmatically.
2001 -06-1 9
TOSHIBA
TC9320F
MAXIMUM RATINGS (Ta = 25°C)
CHARACTERISTIC SYMBOL RATING UNIT
Supply Voltage VDD -0.3--7.0 V
Input Voltage VIN -0.3--VDD + 0.3 V
Power Dissipation PD 400 mW
Operation Temperature Topr -40--85 "C
Storage Temperature Tstg -65-150 "C
ELECTRICAL CHARACTERISTICS (Unless otherwise
specified, Ta = -40~85°C, VDD = 4.5--5.5V)
CHARACTERISTIC SYMBOL CIR- TEST CONDITION MIN. TYP. MAX. UNIT
CPU operation/PLL stop
Operating Power Supply Radio Stop/CPU
V - . . . . V
Voltage Range DDI Operation 3 5 5 0 5 5
Memory Holding Voltage . .
Range VHD - Crystal oscillation stop 2.0 5.5 V
Radio Stop/CPU
. Operation VDD = 5V,
Operating Power Supply IDD1 - Ta = 25°C - 0.7 1.5 mA
Current . .
In case of connecting
10.8MHz X'tal
Memory Holding Power VDD = 5V,
Supply Current IHD1 - Crystal oscillation stop - 0.1 10 pA
Memory Holding Power VDD = 2V,
I - . . - - A
Supply Current HD2 Crystal oscillation stop 5 '
Crystal Oscillation Frequency fXT - - 3.6 7.2 10.8 MHz
CPU/Radio operation
Operating Power Supply . .
Voltage Range VDD2 - CPU/Radio Operation 4.5 5.0 5.5 V
. CPU/Radio Operation
233::th Power Supply IDD2 - (FMIN = 140 MHz) - 10 25 mA
VDD = 5V, Ta = 25°C
Radio operating frequency range
FMIN (FMH Mode) fFMH - VIN = 0.5 Vp-p 30 ' 185 MHz
FMIN (FML Mode) fFML - VIN = 0.3 Vp-p 30 ~ 140 MHz
AMIN (HF Mode) fHF - VIN = 0.3 Vp-p 1 _ 40 MHz
AMIN (LF Mode) fLF - VIN = 0.3 Vp-p 0.5 -- 20 MHz
11 2001-06-19
TOSHIBA TC9320F
CHARACTERISTIC SYMBOL CIR- TEST CONDITION MIN. TYP. MAX. UNIT
Radio operating input amplitude range
FMIN (FMH Mode) VIN (FMH) - fIN = 30--185 MHz 0.5 -- VDD - 0.5 Vp-p
FMIN (FML Mode) VIN (FML) - fIN = 30--140 MHz 0.3 ..- VDD - 0.5 Vp-p
AMIN (HF Mode) VIN (HF) - hN = I--40 MHz 0.3 -- VDD - 0.5 Vp-p
AMIN (LF Mode) VIN (LF) - fIN = 0.5~20MHZ 0.3 ~ VDD - 0.5 Vp-p
LCD common output (COM1, COM2)
. VOH = 4.5 v,
Output High Level IOH1 - VDD = SV 250 750 - A
Current VOH = 0.5V, #
I I - 2 7 -
Low Leve 0L1 VDD = SV 50 50
1/2 Bias Voltage v35 - VDD = SV, No Load 2.30 2.50 2.70 v
LCD segment output (SI-SM)
. VOH = 4.5 v,
Output High Level IOH2 - VDD = 5V 100 300 - A
Current VOH = 0.5V,
Low Level IOL2 - VDD = 5V 100 300 -
P1-1~P1-4, P2-1--P2-4 (SO, CK, STB), P3-1--P3-3, P4-1, TO-T? output port
. VOH = 4.5V,
Output High Level IOH3 - VDD = 5V 1.0 3.0 mA
Current VOH = 0.5V,
Low Level I0L3 - VDD = 5V 1.0 3.0 -
"rfilTil"' input port
INH High Level lhH2 - - VDD x 0.85 _.. VDD V
Input Voltage Low Level VIL2 - - 0 -- VDD x 0.5
. - = = . - - i 2
Input Leak High Level IIHI VIH VDD 5 5V
Current Low Level um - VIL = ov, - - :2 pA
VDD = 5.5V
Key input port (K0--K3)
Input High Level V|H1 - - VDD x 0.7 -- VDD V
Voltage Low Level lhLI - - 0 -- VDD x 0.3
Pull-down Resistance R - VIH = VDD = 5V, 50 100 150 kft
lbll Ta = 25°C
12 2001-06-19
TOSHIBA TC9320F
CHARACTERISTIC SYMBOL CIR- TEST CONDITION MIN. TYP. MAX. UNIT
INI, IN1, lblil, P1-1~P1-4, P2-1--P2-4 (SI), P3-1-P3-3, P4-1 port
. - - V .7 ~ V
Input Voltage High Level IhHI DD x 0 DD V
Low Level 1/IL1 - - 0 -- VDD x 0.3
. - V = V = . V - - i 2
Input Leak High Level 'IH1 VIH 05D 5 5 A
C ent - IL = ' - - :2 g
urr Low Level 'IL1 VDD = 5.5V
A/D, D/A converter (DC'REF, A/DIN1, A/DIN2, D/AOUT)
Analogue Input Voltage
V - AD ' AD 0 ' V V
Range ADI IN1 lN2 DD
Analogue Reference
- . 1. - V V
Voltage Range VREF DC REF 5 DD
Resolution VRES - - - - 6 bit
Analogue Reference DCREF, Ta = 25°C,
- - . 1. A
Voltage Input Current IREF VIH = VDD = 5V 0 5 0 m
Analogue Output
Voltage Range VDAO - DAOUT 0 VDD 1.0 V
Analogue Output IDA = i 100 PA, + +
- - - - 1 V
Voltage Deviation AVDA VDD = 5v, Ta = 25°C 50 50 m
Conversion Total Error - - - - $0.5 $1.5 LSB
FMINI AMIN
Input Feedback Rf1 - VDD = 5V, Ta = 25°C 250 500 1000 k0
Resistance
XT Input Feedback
- v = v T = 2 o 1 17 k0
Resistance Rf2 DD 5 ' a 5 C 500 000 50
TEST Input Pull-down VIH = VDD = 5V,
- 1 k0
Resistance RINZ Ta = 25°C 5 30 60
13 2001-06-19
TOSHIBA TC9320F
PACKAGE DIMENSIONS
QFP60-P-1414-0.80E Unit : mm
16.2i0.3 ,
14.0102 "
t 'lfll2lpa2Sl9l29iilgl) "
:'il-4t,-aE- 313 30
[III =
DI 313 cu tn.
gf El 3 E
CE 11: " ai
[III III '- '""
BI 313
CLIE =
:11: ED
60 ' 3316
iEHEH tltlrlijljljl3i._,.._...,
1.4TYP " - , P.35:Uh1
Ltt.g]
gurgl:
______________ E, oi
:I '9'1 5—0-05
Weight : 0.85g (Typ.)
l l 0.73i0.2
14 2001-06-19
TOSHIBA TC9320F
RESTRICTIONS ON PRODUCT USE
000707EBA
OTOSHIBA is continually working to improve the quality and reliability of its products.
Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent
electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer,
when utilizing TOSHIBA products, to comply with the standards of safety in making a safe
design for the entire system, and to avoid situations in which a malfunction or failure of such
TOSHIBA products could cause loss of human life, bodily injury or damage to property.
In developing your designs, please ensure that TOSHIBA products are used within specified
operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please
keep in mind the precautions and conditions set forth in the "Handling Guide for
Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc..
OThe TOSHIBA products listed in this document are intended for usage in general electronics
applications (computer, personal equipment, office equipment, measuring equipment, industrial
robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor
warranted for usage in equipment that requires extraordinarily high quality and/or reliability or
a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended
Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship
instruments, transportation instruments, traffic signal instruments, combustion control
instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA
products listed in this document shall be made at the customer's own risk.
0 The products described in this document are subject to the foreign exchange and foreign trade
OThe information contained herein is presented only as a guide for the applications of our
products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of
intellectual property or other rights of the third parties which may result from its use. No
license is granted by implication or otherwise under any intellectual property or other rights of
TOSHIBA CORPORATION or others.
0 The information contained herein is subject to change without notice.
15 2001-06-19
:
www.loq.com
.
ic,good price


TEL:86-533-2716050      FAX:86-533-2716790
   

©2020 IC PHOENIX CO.,LIMITED