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TC55W800FT-70
524,288-WORD BY 16-BIT/1,048,576-WORD BY 8-BIT FULL CMOS STATIC RAM
TC55W800FT-55,-70 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS�
524,288-WORD BY 16-BIT/1,048,576-WORD BY 8-BIT FULL CMOS STATIC RAM
DESCRIPTION The TC55W800FT is a 8,388,608-bit static random access memory (SRAM) organized as 524,288 words by 16
bits/1,048,576 words by 8 bits. Fabricated using Toshiba's CMOS Silicon gate process technology, this device
operates from a single 2.3 to 3.3 V power supply. Advanced circuit technology provides both high speed and low
power at an operating current of 3 mA/MHz and a minimum cycle time of 55 ns. It is automatically placed in
low-power mode at 0.5 �A standby current (at VDD � 3 V, Ta � 25°C, maximum) when chip enable ( CE1 ) is asserted
high or (CE2) is asserted low. There are three control inputs. CE1 and CE2 are used to select the device and for
data retention control, and output enable (OE ) provides fast memory access. Data byte control pin (LB, UB)
provides lower and upper byte access. This device is well suited to various microprocessor system applications
where high speed, low power and battery backup are required. And, with a guaranteed operating extreme
temperature range of �40° to 85°C, the TC55W800FT can be used in environments exhibiting extreme temperature
conditions. The TC55W800FT is available in a plastic 48-pin thin-small-outline package (TSOP).
FEATURES Low-power dissipation
Operating: 9.9 mW/MHz (typical) Single power supply voltage of 2.3 to 3.3 V Power down features usingCE1 and CE2 Data retention supply voltage of 1.5 to 3.3 V Direct TTL compatibility for all inputs and outputs Wide operating temperature range of �40° to 85°C Standby Current (maximum):
PIN ASSIGNMENT (TOP VIEW) PIN NAMES 48 PIN TSOP Access Times (maximum): Package:
TSOPⅠ48-P-1220-0.50 (Weight: 0.52 g typ)
(Normal)
25
48
