STTS75M2F ,Digital temperature sensor and thermal watchdogFunctional description . . . . . . 173.1 Registers and register set formats . . . . . . 173 ..
STU100N3LF3 , N-channel 30V - 0.0045OHM - 80A - DPAK - IPAK Planar STripFET TM II Power MOSFET
STU10NM60N ,N-channel 600 V, 0.53 Ohm, 10 A, IPAK MDmesh(TM) II Power MOSFETElectrical characteristics(Tcase =25 °C unless otherwise specified)Table 5. On /off statesSymbol Pa ..
STU13NB60 ,OLD PRODUCT: NOT SUITABLE FOR NEW DESIGN-INSTU13NB60N-CHANNEL ENHANCEMENT MODEPowerMESH™ MOSFETPRELIMINARY DATATYPE V R IDSS DS(on) DSTU13NB6 ..
STU14NA50 ,OLD PRODUCT: NOT SUITABLE FOR NEW DESIGN-INSTU14NA50N - CHANNEL ENHANCEMENT MODEFAST POWER MOS TRANSISTORPRELIMINARY DATATYPE V R IDSS DS(on) ..
STU2240NL , N-Channel E nhancement Mode Field Effect Transistor
T6816 ,40-V dual Hexdriver with serial input controlapplications and the industrial 24-V supply.It controls up to 12 different loads via a 16-bit dataw ..
T6816 ,40-V dual Hexdriver with serial input controlFeatures• Six High-side and Six Low-side Drivers Outputs Freely Configurable as Switch, Half Brid ..
T6816 ,40-V dual Hexdriver with serial input controlapplications.Overvoltage protection is matched to the requirements of the 24-V industrial voltagean ..
T6816-TIQ ,40-V Dual Hex Output Driver with Serial Input ControlFeatures• Six High-side and Six Low-side Drivers Outputs Freely Configurable as Switch, Half Brid ..
T6817 ,Dual triple driver with 16-bit serial interfaceFeatures• Three High-side and Three Low-side Drivers Outputs Freely Configurable as Switch, Half B ..
T6817-TKQ ,Dual Triple DMOS Output Driver with Serial Input ControlFeatures• Three High-side and Three Low-side Drivers Outputs Freely Configurable as Switch, Half B ..
STTS75M2F
Digital temperature sensor and thermal watchdog
June 2010 Doc ID 13298 Rev 11 1/41
STTS75Digital temperature sensor and thermal watchdog
Features Measures temperatures from
–55 °C to +125 °C (–67 °F to +257 °F) ±0.5 °C (typ) accuracy ±2 °C (max) accuracy from
–25 °C to +100 °C Low operating current: 75 µA (typ) No external components required 2-wire I2 C/SMBus-compatible serial interface Selectable serial bus address allows
connection of up to eight devices on the
same bus Thermometer resolution is user-configurable
from 9 (default) to 12 bits (0.5 °C to 0.0625 °C) 9-bit conversion time is 45 ms (typ) Programmable temperature threshold and
hysteresis set points Wide power supply range-operating voltage
range: 2.7 V to 5.5 V Power saving one-shot temperature
measurement Power-up defaults permit standalone operation
as thermostat Shutdown mode to minimize power
consumption Separate open drain output pin operates as an
interrupt or comparator/thermostat output (dual
purpose event pin) Packages:
–SO8 MSOP8 (TSSOP8)
Contents STTS752/41 Doc ID 13298 Rev 11
Contents Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61.1 Serial communications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.2 T emperature sensor output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.3 Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.3.1 SDA (open drain) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.3.2 SCL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.3.3 OS/INT (open drain) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.3.4 GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.3.5 A2, A1, A0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.3.6 VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102.1 Applications information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.2 Thermal alarm function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.3 Comparator mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.4 Interrupt mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.5 Fault tolerance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.6 Shutdown mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.7 T emperature data format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.8 Bus timeout feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.9 One-shot mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173.1 Registers and register set formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.1.1 Command/pointer register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.1.2 Configuration register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.1.3 Temperature register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.1.4 Overlimit temperature register (TOS) . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.1.5 Hysteresis temperature register (THYS) . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.2 Power-up default conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.3 Serial interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.4 2-wire bus characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.4.1 Bus not busy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
STTS75 ContentsDoc ID 13298 Rev 11 3/41
3.4.2 Start data transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.4.3 Stop data transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.4.4 Data valid . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.4.5 Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.5 READ mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.6 WRITE mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Typical operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Package marking information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
List of tables STTS75
4/41 Doc ID 13298 Rev 11
List of tables
Table 1. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 2. Fault tolerance setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 3. Shutdown mode and one-shot mode description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 4. Relationship between temperature and digital output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 5. Command/pointer register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 6. Register pointers selection summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 7. Configuration register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 8. Programmable resolution configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 9. Temperature register format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 10. TOS and THYS register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 11. STTS75 serial bus slave addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 12. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 13. Operating and AC measurement conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Table 14. DC and AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 15. AC characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Table 16. SO8 – 8-lead plastic small outline (4.90 mm x 3.90 mm) package mechanical data . . . . . 34
Table 17. MSOP8 (TSSOP8) – 8-lead, thin shrink small outline (3 mm x 3 mm) package
mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 18. Carrier tape dimensions for SO8 and MSOP8 (TSSOP8) packages . . . . . . . . . . . . . . . . . 36
Table 19. Reel dimensions for 12 mm carrier tape - SO8 and MSOP8 (TSSOP8) packages . . . . . . 37
Table 20. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Table 21. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
STTS75 List of figures
Doc ID 13298 Rev 11 5/41
List of figures
Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 2. Connections (SO8, TSSOP8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 3. Functional block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 4. Typical 2-wire interface connection diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 5. OS output temperature response diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 6. Serial bus data transfer sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 7. Acknowledgement sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 8. Slave address location . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 9. Typical 2-byte READ from preset pointer location (e.g. temp - TOS, THYS) . . . . . . . . . . . . 25
Figure 10. Typical pointer set followed by an immediate READ for 2-byte register (e.g. temp). . . . . . 25
Figure 11. Typical 1-byte READ from the configuration register with preset pointer . . . . . . . . . . . . . . 25
Figure 12. Typical pointer set followed by an immediate READ from the configuration register . . . . . 26
Figure 13. Configuration register WRITE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 14. TOS and THYS WRITE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 15. Temperature variation vs. voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 16. Bus timing requirements sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 17. SO8 – 8-lead plastic small outline (4.90 mm x 3.90 mm) package mechanical drawing . . 34
Figure 18. MSOP8 (TSSOP8) – 8-lead, thin shrink small outline (3 mm x 3 mm) package
mechanical drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Figure 19. Carrier tape for SO8 and MSOP8 (TSSOP8) packages. . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 20. Reel schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Figure 21. Device topside marking information (SO8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Figure 22. Device topside marking information (MSOP8/TSSOP8). . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Description STTS75
6/41 Doc ID 13298 Rev 11
1 Description
The STTS75 is a high-precision CMOS (digital) temperature sensor IC with a delta-sigma
analog-to-digital (ADC) converter and an I2 C-compatible serial digital interface. It is targeted
for general applications such as personal computers, system thermal management,
electronics equipment, and industrial controllers, and is packaged in the industry standard
8-lead MSOP(TSSOP) and SO8 packages.
The device contains a band gap temperature sensor and programmable 9- to 12-bit ADC
which monitor and digitize the temperature to a resolution up to 0.0625 °C. The STTS75 is
typically accurate to (±3 °C - max) over the full temperature measurement range of
–55 °C to 125 °C with ±2 °C accuracy in the –25 °C to +100 °C range. At power-up, the
STTS75 defaults to 9-bit resolution for software compatibility with the STLM75.
The STTS75 is specified for operating at supply voltages from 2.7 V to 5.5 V . Operating at
3.3 V, the supply current is typically (75 µA).
The onboard delta-sigma analog-to-digital converter (ADC) converts the measured
temperature to a digital value that is calibrated in °C; for Fahrenheit applications a lookup
table or conversion routine is required.
The STTS75 is factory-calibrated and requires no external components to measure
temperature.
1.1 Serial communications
The STTS75 has a simple 2-wire I2 C-compatible digital serial interface which allows the
user to access the data in the temperature register at any time. It communicates via the
serial interface with a master controller which operates at speeds up to 400 kHz. Three pins
(A0, A1, and A2) are available for address selection, and enable the user to connect up to 8
devices on the same bus without address conflict.
In addition, the serial interface gives the user easy access to all STTS75 registers to
customize operation of the device.
1.2 Temperature sensor output
The STTS75 temperature sensor has a dedicated open drain overlimit signal/alert
(OS/INT/Alert) output which features a thermal alarm function. This function provides a
user-programmable trip and turn-off temperature. It can operate in either of two selectable
modes: Section 2.3: Comparator mode, and Section 2.4: Interrupt mode.
At power-up the STTS75 comes up in 9-bit mode and immediately begins measuring the
temperature and converting the temperature to a digital value. The resolution of the digital
output data is user-configurable to 9, 10, 11, or 12 bits which correspond to temperature
increments of 0.5 °C, 0.25 °C, 0.125 °C, and 0.0625 °C, respectively.
STTS75 Description
Doc ID 13298 Rev 11 7/41
The measured temperature value is compared with a temperature limit (which is stored in
the 16-bit (TOS) READ/WRITE register), and the hysteresis temperature (which is stored in
the 16-bit (THYS) READ/WRITE register). If the measured value exceeds these limits, the
OS/INT pin is activated (see Figure 3 on page8).
Figure 1. Logic diagram SDA and OS/INT are open drain.
Note: See Pin descriptions on page 9 for details.
Note: See Pin descriptions on page 9 for details.
Table 1. Signal names SDA and OS/INT are open drain.
Description STTS75
8/41 Doc ID 13298 Rev 11
Figure 2. Connections (SO8, TSSOP8) SDA and OS/INT are open drain.
Note: See Pin descriptions on page 9 for details.
Figure 3. Functional block diagram
STTS75 Description
Doc ID 13298 Rev 11 9/41
1.3 Pin descriptions
See Figure 1 on page 7 and Table 1 on page 7 for a brief overview of the signals connected
to this device.
1.3.1 SDA (open drain)
This is the serial data input/output pin for the 2-wire serial communication port.
1.3.2 SCL
This is the serial clock input pin for the 2-wire serial communication port.
1.3.3 OS/INT (open drain)
This is the overlimit signal/interrupt alert output pin. It is open drain, so it needs a pull-up
resistor.
Note: The open drain thermostat output that indicates if the temperature has exceeded user-
programmable limits (over/under temperature indicator).
1.3.4 GND
Ground; it is the reference for the power supply. It must be connected to system ground.
1.3.5 A2, A1, A0
A2, A1, and A0 are selectable address pins for the 3LSBs of the I2 C interface address. They
can be set to VDD or GND to provide 8 unique address selections.
1.3.6 VDD
This is the supply voltage pin and ranges from +2.7 V to +5.5 V.
Operation STTS75
10/41 Doc ID 13298 Rev 11
2 Operation
After each temperature measurement and analog-to-digital conversion, the STTS75 stores
the temperature as a 16-bit two’s complement number in the 2-byte temperature register.
The most significant bit (S, bit 15) indicates if the temperature is positive or negative: for positive numbers S = 0, and for negative numbers S = 1.
The most recently converted digital measurement can be read from the temperature register
at any time. Since temperature conversions are performed in the background, reading the
temperature register does not affect the operation in progress.
Bits 3 through 0 of the temperature register are hardwired to logic '0.' When the STTS75 is
configured for 12-bit resolution, the 12 MSBs (bits 15 through 4) of the temperature register
will contain temperature data. For 11-bit resolution, the 11 MSBs (bits 15 through 5) of the
temperature register will contain data, and bit 4 will read out as logic '0.' For 10-bit
resolution, the 10 MSBs (bits 15 through 6) will contain data, and for 9-bit resolution the
9 MSBs (bits 15 through 7) will contain data and all unused LSBs will contain '0s.'able 4 on page 15 gives examples of 12-bit resolution digital output data and the
corresponding temperatures. The data is compared to the values in the TOS and THYS
registers, and then the OS/INT is updated based on the result of the comparison and the
operating mode. The number of TOS and THYS bits used during the thermostat comparison
is equal to the conversion resolution set by the FT1 and FT0 bits in the configuration
register. For example, if the resolution is 9 bits, only the 9 MSBs of TOS and THYS will be
used by the thermostat comparator. The alarm fault tolerance is controlled by the FTI and
FTO bits in the configuration register. They are used to set up a fault queue. This prevents
false tripping of the OS/INT pin when the STTS75 is used in a noisy environment (see able 2 on page 14).
The STTS75 also supports a special one-shot mode feature that performs a single
temperature measurement and returns to shutdown mode. This is especially useful for low-
power applications. This features is accessed by first putting the device in shutdown mode,
then enabling the one-shot mode (OSM) bit in the configuration register.
The active state of the OS/INT output can be changed via the polarity (POL) bit in the
configuration register. The power-up default is active-low.
If the user does not wish to use the thermostat capabilities of the STTS75, the OS/INT
output should be left floating.
Note: If the thermostat is not used, the TOS and THYS registers can be used for general storage of
system data.
STTS75 Operation
Doc ID 13298 Rev 11 11/41
2.1 Applications information
STTS75 digital temperature sensors are optimal for thermal management and thermal
protection applications. They require no external components for operations except for pull-
up resistors on SCL, SDA, and OS/INT outputs. A 0.1 µF bypass capacitor is recommended.
The sensing device of STTS75 is the chip itself. The typical interface connection for this type
of digital sensor is shown in Figure 4 on page11.
Intended applications include: System thermal management Computers/disk drivers Electronics/test equipment Power supply modules Consumer products Battery management Fax/printers management Automotive
Figure 4. Typical 2-wire interface connection diagram SDA and OS/INT are open drain.
Operation STTS75
12/41 Doc ID 13298 Rev 11
2.2 Thermal alarm function
The STTS75 thermal alarm function provides user-programmable thermostat capability and
allows the STTS75 to function as a standalone thermostat without using the serial interface.
The OS/INT output is the alarm output. This signal is an open drain output, and at power-up,
this pin is configured with active-low polarity by default.
2.3 Comparator mode
In comparator mode, each time a temperature-to-digital (T -to-D) temperature conversion
occurs, the new digital temperature is compared to the value stored in the TOS and THYS
registers. If a fault tolerance number of consecutive temperature measurements are greater
than the value stored in the TOS register, the OS/INT output will be activated.
For example, if the FT1 and FT0 bits are equal to “10” (fault tolerance = 4), four consecutive
temperature measurements must exceed TOS to activate the OS/INT output. Once the
OS/INT output is active, it will remain active until the first time the measured temperature
drops below the temperature stored in the THYS register.
When the thermostat is in comparator mode, the OS/INT can be programmed to operate
with any amount of hysteresis. The OS/INT output becomes active when the measured
temperature exceeds the TOS value a consecutive number of times as defined by the FT1
and FT0 fault tolerance (FT) bits in the configuration register. The OS/INT then stays active
when the temperature falls below the value stored in THYS register for a consecutive number
of times as defined by the fault tolerance bits (FT1 and FT0). Putting the device into
shutdown mode does not clear OS/INT in comparator mode.
STTS75 Operation
Doc ID 13298 Rev 11 13/41
2.4 Interrupt mode
In Interrupt mode, the OS/INT output first becomes active when the measured temperature
exceeds the TOS value a consecutive number of times equal to the FT value in the
configuration register. Once activated, the OS/INT can only be cleared by either putting the
STTS75 into shutdown mode or by reading from any register (temperature, configuration,
TOS, or THYS) on the device. Once the OS/INT has been deactivated, it will only be
reactivated when the measured temperature falls below the THYS value a consecutive
number of times equal to the FT value. Figure 5 illustrates typical OS output temperature
response for STTS75 configured to have a fault tolerance of 2. The interrupt/clear process is
cyclical between TOS and THYS.
Figure 5. OS output temperature response diagram This assumes that a READ has occurred.
Note: The STTS75 is configured to have a fault tolerance of 2 in this example.
Operation STTS75
14/41 Doc ID 13298 Rev 11
2.5 Fault tolerance
For both comparator and interrupt modes, the alarm “fault tolerance” setting plays a role in
determining when the OS/INT output will be activated. Fault tolerance refers to the number
of consecutive times an error condition must be detected before the user is notified. Higher
fault tolerance settings can help eliminate false alarms caused by noise in the system. The
alarm fault tolerance is controlled by the bits (bits 4 and 3) in the configuration register.
These bits can be used to set the fault tolerance to 1, 2, 4, or 6 as shown in Table 2. At
power-up, these bits both default to logic '0.'
Note: OS output will be asserted one tCONV after fault tolerance is met, provided that the error
condition remains.
2.6 Shutdown mode
For power-sensitive applications, the STTS75 offers a low-power shutdown mode. The SD
bit in the configuration register controls shutdown mode. When SD is changed to login '1,'
the conversion in progress will be completed and the result stored in the temperature
register, after which the STTS75 will go into a low-power standby state. The OS/INT output
will be cleared if the thermostat is operating in Interrupt mode and the OS/INT will remain
unchanged in comparator mode. The 2-wire interface remains operational in shutdown
mode, and writing a '0' to the SD bit returns the STTS75 to normal operation.
Table 2. Fault tolerance setting
Table 3. Shutdown mode and one-shot mode description The shutdown command needs to be programmed before sending a one-shot command.
STTS75 Operation
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2.7 Temperature data format
Table 4 shows the relationship between the output digital data and the external temperature
for 12-bit resolution. emperature data for temperature, TOS and THYS registers is represented by 9-bit, 10-bit,
11-bit, and 12-bit depending upon the resolution bits RC1, RC0 (bits 6 and 5) in the
configuration register (see Table 7 on page 18). The default resolution is 9-bit.
The left-most bit in the output data stream controls temperature polarity information for each
conversion. If the sign bit is '0', the temperature is positive and of the sign bit is '1', the
temperature is negative.
2.8 Bus timeout feature
The STTS75 supports an SMBus-compatible timeout function which will reset the serial 2 C/SMBus interface if SDA is held low for a period greater than the timeout duration
between a START and STOP condition. If this occurs, the device will release the bus and
wait for another START condition.
Table 4. Relationship between temperature and digital output
Operation STTS75
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2.9 One-shot mode
STTS75 supports a one-shot temperature measurement mode. This is invoked by putting
the device in shutdown mode (SD bit 0 in the configuration register is set to ‘1’) and writing a
‘1’ to the OSM (bit 7) to start a single temperature conversion. STTS75 returns to the
shutdown state after completion of the single conversion. This is useful to reduce power
consumption when continuous monitoring is not needed. When the configuration register is
read, the OSM bit will read ‘0’.
STTS75 Functional description
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3 Functional description
The STTS75 registers have unique pointer designations which are defined in Table 6 on
page 17. Whenever any READ/WRITE operation to the STTS75 register is desired, the user
must “point” to the device register to be accessed.
All of these user-accessible registers can be accessed via the digital serial interface at
anytime (see Serial interface on page 21), and they include: Command register/address pointer register Configuration register Temperature register Overlimit signal temperature register (TOS) Hysteresis temperature register (THYS)
3.1 Registers and register set formats
3.1.1 Command/pointer register
The most significant bits (MSBs) of the command register must always be zero. Writing a '1'
into any of these bits will cause the current operation to be terminated (see Table5).
The command register retains pointer information between operations. Therefore, this
register only needs to be updated once for consecutive READ operations from the same
register. All bits in the command register default to '0' at power-up.
Table 5. Command/pointer register format
Table 6. Register pointers selection summary
Functional description STTS75
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3.1.2 Configuration register
The configuration register is used to store the device settings such as device operation
mode, OS/INT operation mode, OS/INT polarity, and OS/INT fault queue.
The configuration register allows the user to program various options such as conversion
resolution (see Table 8), thermostat fault tolerance, thermostat polarity, thermostat operating
mode, and shutdown mode. The user has READ/WRITE access to all of the bits in the
configuration register. The entire register is volatile and thus powers up in its default state
only.
Table 7. Configuration register format
Keys: SD = shutdown control bit FT1 = fault tolerance1 bit
M = thermostat mode(1) Indicates operation mode; 0 = comparator mode, and 1 = interrupt mode (see Comparator mode and
Interrupt mode on page13).
RC0 = resolution conversion0 bit
POL = output polarity(2) The OS/INT is active-low ('0').
RC1 = resolution conversion1 bit
FT0 = fault tolerance0 bit OSM = one-shot mode bit
Table 8. Programmable resolution configurations
STTS75 Functional description
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3.1.3 Temperature register
The temperature register is a two-byte (16-bit) “Read only” register (see Table 9 on
page 19). Digital temperatures from the ADC are stored in the temperature register in two’s
complement format, and the contents of this register are updated each time the A/D
conversion is finished.
The user can read data from the temperature register at any time. When a T -to-D conversion
is completed, the new data is loaded into a comparator buffer to evaluate fault conditions
and will update the temperature register if a read cycle is not ongoing. If a READ is ongoing,
the previous temperature will be read. Accessing the STTS75 continuously without waiting
at least one conversion time between communications will prevent the device from updating
the temperature register with a new temperature conversion result. Consequently, the
STTS75 should not be accessed continuously with a wait time of less than tCONV (max).
Depending on the A/D conversion resolution, the 9-, 10-, 11- or 12-bit MSBs of the register
will contain temperature data. All unused bits following the digital temperature will be zero.
The MSB (bit 15) of the temperature register denotes whether the temperature data is
positive or negative. A '0' in bit 15 is positive and a '1' is negative.
3.1.4 Overlimit temperature register (TOS)
The TOS register is a two-byte (16-bit) READ/WRITE register that stores the user-
programmable upper trip-point temperature for the thermal alarm in two’s complement
format (see Table 10 on page 20). This register defaults to 80 °C at power-up (i.e., 0101
0000 0000 0000).
The format of the TOS register is identical to that of the temperature register. The 4 LSBs of
the TOS register are hardwired to zero, so data written to these register bits will be ignored.
The MSB position contains the sign bit for the digital temperature and bit14 contains the
temperature MSB.
The resolution setting for the A/D conversion determines how many bits of the TOS register
are used by the thermal alarm. For example, for 9-bit conversions, the trip-point temperature
is defined by the 9 MSBs of the TOS register, and all remaining bits are “Don’t cares.”
Table 9. Temperature register format
Keys: SB = two’s complement sign bit
TMSB = temperature MSB
TLSB = temperature LSB
TD = temperature data
Functional description STTS75
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3.1.5 Hysteresis temperature register (T HYS)
THYS register is a two-byte (16-bit) READ/WRITE register that stores the user-
programmable lower trip-point temperature for the thermal alarm in two’s complement
format (see Table 10). This register defaults to 75 °C at power-up (i.e., 0100 1011 0000
0000).
The format of this register is the same as that of the temperature register. The 4 LSBs of the
THYS register are hardwired to zero, so data written to these bits is ignored. The MSB
position contains the sign bit for the digital temperature and bit 14 contains the temperature
MSB.
The resolution setting for the A/D conversion determines how many bits of the THYS register
are used by the thermal alarm. For example, for 9-bit conversions, the hysteresis
temperature is defined by the 9 MSBs of the THYS register, and all remaining bits are “Don’t
cares.”
3.2 Power-up default conditions
The STTS75 always powers up in the following default states: Thermostat mode = comparator mode Polarity = active-low Fault tolerance = 1 fault (i.e., relevant bits set to '0' in the configuration register) TOS = 80 °C THYS = 75 °C OSM = 0 (disabled) Register pointer = 00 (temperature register) Conversion resolution = 9-bit (i.e., RC0 = 0 and RC1 = 0 in the configuration register;
see Table 7 on page18)
Note: After power-up these conditions can be reprogrammed via the serial interface.
Table 10. TOS and THYS register format
Keys: SB = two’s complement sign bit
TMSB = temperature MSB
TLSB = temperature LSB
TD = temperature data
STTS75 Functional description
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3.3 Serial interface
Writing to and reading from the STTS75 registers is accomplished via the two-wire serial
interface protocol which requires that one device on the bus initiates and controls all READ
and WRITE operations. This device is called the “master” device. The master device also
generates the SCL signal which provides the clock signal for all other devices on the bus.
These other devices on the bus are called “slave” devices. The STTS75 is a slave device
(see Table 11). Both the master and slave devices can send and receive data on the bus.
During operations, one data bit is transmitted per clock cycle. All operations follow a
repeating, nine-clock-cycle pattern that consists of eight bits (one byte) of transmitted data
followed by an acknowledge (ACK) or not acknowledge (NACK) from the receiving device.
Note: There are no unused clock cycles during any operation, so there must not be any breaks in
the data stream and ACKs/NACKs during data transfers. Conversely, having too few clock
cycles can lead to incorrect operation if an inadvertent 8-bit READ from a 16-bit register
occurs.
3.4 2-wire bus characteristics
The bus is intended for communication between different ICs. It consists of two lines: a bi-
directional data signal (SDA) and a clock signal (SCL). Both the SDA and SCL lines must be
connected to a positive supply voltage via a pull-up resistor. The following protocol has been defined: Data transfer may be initiated only when the bus is not busy. During data transfer, the data line must remain stable whenever the clock line is high. Changes in the data line, while the clock line is high, will be interpreted as control
signals.
Accordingly, the following bus conditions have been defined (see Figure 6 on page 22):
3.4.1 Bus not busy
Both data and clock lines remain high.
3.4.2 Start data transfer
A change in the state of the data line, from high to low, while the clock is high, defines the
START condition.
3.4.3 Stop data transfer
A change in the state of the data line, from low to high, while the clock is high, defines the
STOP condition.
Table 11. STTS75 serial bus slave addresses
