STG3680QTR ,LOW VOLTAGE 5OHM MAX DUAL SPDT SWITCH WITH BREAK BEFORE MAKE FEATUREAbsolute Maximum Ratings are those values beyond which damage to the device may occur. Functional o ..
STG3682QTR ,Low Voltage High Bandwidth Dual SPDT Switchfeatures are fast switching speed, Break Before Make Delay Time and Ultra Low Power Consumption. Al ..
STG3682QTR ,Low Voltage High Bandwidth Dual SPDT SwitchFeatures■ Ultra low power dissipation:–I = 0.2µA (Max.) at T = 85°CCC A■ Low “ON” resistance:–R = 4 ..
STG3682QTR ,Low Voltage High Bandwidth Dual SPDT SwitchElectrical characteristics . . . . . 65 Test circuits . . . . . . 106 Package mechanica ..
STG3684ADTR , Low voltage 0.5 Ω max dual SPDT switch with break-before-make
STG3684ADTR , Low voltage 0.5 Ω max dual SPDT switch with break-before-make
SUP85N03-04P ,N-Channel 30-V (D-S) 175C MOSFETS-20120—Rev. B, 12-Mar-022SUP/SUB85N03-04PNew ProductVishay SiliconixTYPICAL CHARACTERISTICS (25C ..
SUP85N04-03 ,N-Channel 40-V (D-S) 175C MOSFETSUP/SUB85N04-03New ProductVishay SiliconixN-Channel 40-V (D-S) 175C MOSFET
STG3680QTR
LOW VOLTAGE 5OHM MAX DUAL SPDT SWITCH WITH BREAK BEFORE MAKE FEATURE
1/11May 2004 HIGH SPEED:
tPD= 0.3ns (TYP.)at VCC =3.0V
tPD= 0.4ns (TYP.)at VCC =2.3V ULTRA LOW POWER DISSIPATION:CC =0.2μA (MAX.)atTA= 85°C LOW "ON" RESISTANCE VIN =0V: ON-S1 =0.5Ω (MAX.TA= 25°C)atVCC =2.7V ON-S2 =0.8Ω (MAX.TA= 25°C)atVCC =2.7V WIDE OPERATING VOLTAGE RANGE:
VCC (OPR)= 1.65Vto 4.3V SINGLE SUPPLY 4.3V TOLERANT AND 1.8V COMPATIBLE
THRESHOLD ON DIGITAL CONTROL INPUT VCC= 2.3to 3.0V LATCH-UP PERFORMANCE EXCEEDS
300mA (JESD 17)
DESCRIPTIONThe STG3680is an high-speed CMOS DUAL
ANALOG S.P.D.T. (Single Pole Dual Throw)
SWITCHor DUAL 2:1 Multiplexer/Demultiplexer
Bus Switch fabricated in silicon gateC2 MOS
technology.Itis designedto operate from 1.65Vto
4.3V, making this device ideal for portable
applications. offers very low ON-Resistance (<0.5Ω 1S1 and
2S1 channels; <0.8Ω 1S2 and 2S2 channels)atCC =2.7V. The nIN inputs are providedto control
the switches. The switches nS1 are ON (they are
connectedto common Ports Dn) when the nIN
inputis held high and OFF (high impedance state
exists between the two ports) when nINis held
low; the switches nS2 are ON (they are connected common Ports Dn) when the nIN inputis held
low and OFF (high impedance state exists
between the two ports) when INis held high.
Additional key features are fast switching speed,
Break Before Make Delay Time and Ultra Low
Power Consumption. All inputs and outputs are
equipped with protection circuits against static
discharge, giving them ESD immunity and
transient excess voltage. It’s availablein the
commercial temperature range in the QFN
package.
STG3680LOW VOLTAGE 0.5/0.8Ω MAX DUAL SPDT SWITCH
WITH BREAK BEFORE MAKE FEATURE
PIN CONNECTION
ORDER CODESRev.3
STG36802/11
Figure1: Input Equivalent Circuit Table1: Pin Description
Table2: Truth Table(*) High Impedance
Table3: Absolute Maximum RatingsAbsoluteMaximum Ratingsare those values beyond which damagetothe device mayoccur.Functional operation under these conditionsis
not implied.
(1) Derate above 70°C:by 18.5mW/°C.
Table4: Recommended Operating Conditions Truth Table guaranteed: 1.2Vto 4.3V.
STG36803/11
Table5: DC SpecificationsNote1: Guaranteedby design
Note2: ΔRON =RON(MAX) -RON(MIN).
Note3: Flatnessis definedasthe difference betweenthe maximum and minimum valueof on-resistanceas measured overthe specified
analog signal ranges.
STG36804/11
Table6: AC Electrical Characteristics(CL =35pF,RL =50Ω, tr=tf ≤ 5ns)
Table7: Analog Switch Characteristics(CL= 5pF,RL =50Ω,TA= 25°C)
Note1:Off Isolation= 20Log10(VD/VS),VD= output.VS= inputatoff switch
STG36805/11
Figure2: ON Resistance
Figure3: OFF Leakage
Figure4: OFF Isolation
Figure5: Bandwidth
Figure6: ChannelTo Channel Crosstalk
STG36806/11
Figure7: Test Circuit= 5/35pFor equivalent (includesjig and probe capacitance) =50Ωor equivalent =ZOUTof pulse generator (typically 50Ω)
Figure8: Break Before Make Time Delay
Figure9: Charge Injection(V GEN =0V,R GEN =0Ω,RL =1MΩ,CL =100pF)
