SN65LVPE501RGER ,Dual Channel x1 PCI Express Gen II Redriver/Equalizer 24-VQFN -40 to 85FEATURES • Excellent Jitter and Loss CompensationCapability:• Single Lane PCIe Equalizer/Redriver– ..
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SN65LVPE501RGER
Dual Channel x1 PCI Express Gen II Redriver/Equalizer 24-VQFN -40 to 85
SN65LVPE501
www.ti.com SLLSE30A –MAY 2010–REVISED MAY 2012
Dual Channel x1 PCIe Redriver/Equalizer
Checkfor Samples: SN65LVPE501
1FEATURES • Excellent Jitter and Loss Compensation
Capability:• Single Lane PCIe Equalizer/Redriver 30"of6 mil Stripline on FR4• Support for Both PCIe GenI (2.5Gbps) and Small Foot Print–24 Pin4×4 QFN PackageGenII (5.0 Gbps) Speed High Protection Against ESD Transient• Selectable Equalization, De-emphasis and
Output Swing Control – HBM: 3,000V Integrated Termination – CDM: 1,500V Hot-Plug Capable – MM: 200V Receiver Detect APPLICATIONS• Low Power: PC MB, Docking Stations, Backplane and– 330mW(TYP), VCC= 3.3V
Cabled Application• Auto Low Power Modes: 5mW (TYP) When no Connection Detected 70mW (TYP) Whenin Auto-Low Power
Mode
DESCRIPTIONThe SN65LVPE501isa dual channel, single lane PCIe redriver and signal conditioner supporting data ratesofto 5.0Gbps. The device complies with PCIe spec revision 2.1.
Programmable EQ, De-Emphasis and Amplitude SwingThe SN65LVPE501is designedto minimize the signal degradation effects such as crosstalk and inter-symbol
interference (ISI) that limits the interconnect distance between two devices. The input stageof each channel
offers selectable equalization settings that can be programmedto match lossin the channel. The differential
outputs provide selectable de-emphasisto compensate for the anticipated distortion PCIe signal will experience.
Levelof de-emphasis will depend on the lengthof interconnect andits characteristics. Both equalization and de-
emphasis levels are controlledby the settingof signal control pins EQ1, EQ2 and DE1, DE2. provide additional control of signal integrity in extended backplane applications LVPE501 provides controlfor each channel. See Table2 for setting details. power-on reset after VCC has stabilized. External reset can alsobe appliedat anytimeby resetis recommended after every device power-up. When RSTis driven high, theH device where each channel will performIf EN_RXD detect functionis disabled and their setto ZDC_RX.
While EN_RXD pin notin sleep mode (RSTis H), SN65LVPE501 RX.Detectis detected on both Automatic Rx detection featureIn this state both channels input terminationto ZDC_RX.
