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PSMN5R0-100ES
N-channel 100 V 5 m惟 standard level MOSFET in I2PAK
Product profile1.1 General descriptionStandard level N-channel MOSFET in a I2PAK package qualified to 175 °C. This product
is designed and qualified for use in a wide range of industrial, communications and
domestic equipment.
1.2 Features and benefits High efficiency due to low switching
and conduction losses Suitable for standard level gate drive
sources
1.3 Applications DC-to-DC converters Load switching Motor control Server power supplies
1.4 Quick reference data
PSMN5R0-100ES
N-channel 100 V 5 mΩ standard level MOSFET in I2PAK
Rev. 3 — 26 September 2011 Product data sheet
Table 1. Quick reference dataVDS drain-source voltage Tj≥25 °C; Tj≤ 175°C - - 100 V drain current Tmb =25°C; VGS =10V; see Figure 1
[1] --120 A
Ptot total power dissipation Tmb =25°C; see Figure 2 --338 W junction temperature -55 - 175 °C
Static characteristicsRDSon drain-source on-state
resistance
VGS =10V; ID =25A; = 100 °C; see Figure 12;
see Figure 13
-7.7 9 mΩ
VGS =10V; ID =25A; Tj =25°C; see Figure 13
[2] -4.3 5 mΩ
Dynamic characteristicsQGD gate-drain charge VGS =10V; ID =75A;
VDS=50 V; see Figure 14;
see Figure 15
-49 -nC
QG(tot) total gate charge - 170- nC
Avalanche ruggednessEDS(AL)S non-repetitive drain-source avalanche
energy
VGS =10V; Tj(init) =25°C; ID= 120 A; Vsup≤ 100V;
RGS =50 Ω; Unclamped
--537 mJ
NXP Semiconductors PSMN5R0-100ES
N-channel 100 V 5 mΩ standard level MOSFET in I2PAK[1] Continuous current limited by package.
[2] Measured 3 mm from package.
Pinning information Ordering information
Table 2. Pinning information
Table 3. Ordering informationPSMN5R0-100ES I2PAK plastic single-ended package (I2PAK); TO-262 SOT226
NXP Semiconductors PSMN5R0-100ES
N-channel 100 V 5 mΩ standard level MOSFET in I2PAK Limiting values[1] Continuous current limited by package
Table 4. Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).
VDS drain-source voltage Tj≥25 °C; Tj≤ 175°C - 100 V
VDGR drain-gate voltage Tj≥25 °C; Tj≤ 175 °C; RGS =20kΩ - 100 V
VGS gate-source voltage -20 20 V drain current VGS =10 V; Tj= 100 °C; see Figure 1 -110 A
VGS =10 V; Tmb =25°C; see Figure 1 [1]- 120 A
IDM peak drain current pulsed; tp≤10 µs; Tmb =25°C; see Figure 3 - 622 A
Ptot total power dissipation Tmb =25°C; see Figure 2 - 338 W
Tstg storage temperature -55 175 °C junction temperature -55 175 °C
Tsld(M) peak soldering temperature - 260 °C
Source-drain diode source current Tmb =25°C [1]- 120 A
ISM peak source current pulsed; tp≤10 µs; Tmb=25°C - 622 A
Avalanche ruggednessEDS(AL)S non-repetitive drain-source
avalanche energy
VGS =10 V; Tj(init) =25 °C; ID =120A;
Vsup≤ 100 V; RGS =50 Ω; Unclamped 537 mJ
NXP Semiconductors PSMN5R0-100ES
N-channel 100 V 5 mΩ standard level MOSFET in I2PAK
NXP Semiconductors PSMN5R0-100ES
N-channel 100 V 5 mΩ standard level MOSFET in I2PAK Thermal characteristics
Table 5. Thermal characteristicsRth(j-mb) thermal resistance from junction to mounting base see Figure 4 - 0.22 0.44 K/W
Rth(j-a) thermal resistance from junction to ambient Vertical in free air - 60 - K/W
NXP Semiconductors PSMN5R0-100ES
N-channel 100 V 5 mΩ standard level MOSFET in I2PAK CharacteristicsTable 6. Characteristics
Static characteristicsV(BR)DSS drain-source breakdown
voltage= 250 µA; VGS =0 V; Tj=25°C 100 - - V= 250 µA; VGS =0 V; Tj= -55°C 90 --V
VGS(th) gate-source threshold voltage ID =1mA; VDS =VGS; Tj =-55 °C;
see Figure 10
--4.6 V =1mA; VDS =VGS; Tj =175 °C;
see Figure 10 --V =1mA; VDS =VGS; Tj =25°C;
see Figure 11; see Figure 10
234V
IDSS drain leakage current VDS= 100 V; VGS =0V; Tj=25°C - 0.08 10 µA
VDS= 100 V; VGS =0V; Tj= 175°C - - 500 µA
IGSS gate leakage current VGS =-20 V; VDS =0 V; Tj=25°C - 10 100 nA
VGS =20V; VDS =0V; Tj=25°C - 10 100 nA
RDSon drain-source on-state
resistance
VGS =10V; ID =25A; Tj =175 °C;
see Figure 12; see Figure 13 1214mΩ
VGS =10V; ID =25A; Tj =100 °C;
see Figure 12; see Figure 13
-7.7 9 mΩ
VGS =10V; ID =25A; Tj =25°C;
see Figure 13
[1] -4.3 5 mΩ gate resistance f=1 MHz - 0.9 - Ω
Dynamic characteristicsQG(tot) total gate charge ID =75A; VDS =50V; VGS =10V;
see Figure 14; see Figure 15 170 - nC =0A; VDS =0V; VGS=10V - 140 - nC
QGS gate-source charge ID =75A; VDS =50V; VGS =10V;
see Figure 14; see Figure 15
-48 -nC
QGS(th) pre-threshold gate-source
charge
-31 -nC
QGS(th-pl) post-threshold gate-source
charge 17.3 - nC
QGD gate-drain charge - 49 - nC
VGS(pl) gate-source plateau voltage VDS =50V; see Figure 14;
see Figure 15
-5.1 -V
Ciss input capacitance VDS =50V; VGS =0V; f= 1MHz; =25 °C; see Figure 16 9900 - pF
Coss output capacitance - 660 - pF
Crss reverse transfer capacitance - 381 - pF
td(on) turn-on delay time VDS =50V; RL =0.67 Ω; VGS =10V;
RG(ext) =4.7 Ω; ID =75A; Tj =25°C
-45 -ns rise time - 91 - ns
td(off) turn-off delay time - 122 - ns fall time - 63 - ns
NXP Semiconductors PSMN5R0-100ES
N-channel 100 V 5 mΩ standard level MOSFET in I2PAK[1] Measured 3 mm from package.
Source-drain diodeVSD source-drain voltage IS =25 A; VGS =0V; Tj =25 °C;
see Figure 17
-0.8 1.2 V
trr reverse recovery time IS =25 A; dIS/dt= -100 A/µs;
VGS =0V; VDS =50V
-75 -ns recovered charge - 235 - nC
Table 6. Characteristics …continued
