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PSMN3R0-60BS |PSMN3R060BSNXP/PHN/a10000avaiN-channel 60 V 3.2 m惟 standard level MOSFET in D2PAK


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PSMN3R0-60BS
N-channel 60 V 3.2 m惟 standard level MOSFET in D2PAK
Product profile1.1 General description
Standard level N-channel MOSFET in a D2PAK package qualified to 175 °C. This product
is designed and qualified for use in a wide range of industrial, communications and
domestic equipment.
1.2 Features and benefits
High efficiency due to low switching
and conduction losses Suitable for standard level gate drive
sources
1.3 Applications
DC-to-DC converters Load switching Motor control Server power supplies
1.4 Quick reference data

[1] Continuous current is limited by package
PSMN3R0-60BS
N-channel 60 V 3.2 mΩ standard level MOSFET in D2PAK
Rev. 1 — 22 March 2012 Product data sheet
Table 1. Quick reference data

VDS drain-source voltage Tj≥25 °C; Tj≤ 175°C --60 V drain current Tmb =25 °C; VGS =10V; see Figure 1
[1] - - 100 A
Ptot total power dissipation Tmb=25 °C; see Figure 2 - - 306 W junction temperature -55 - 175 °C
Static characteristics

RDSon drain-source on-state
resistance
VGS =10V; ID =25A; Tj =100 °C;
see Figure 12; see Figure 13 4.32 5.1 mΩ
VGS =10V; ID =25A; Tj =25°C;
see Figure 13
-2.7 3.2 mΩ
Dynamic characteristics

QGD gate-drain charge VGS =10V; ID =25A; VDS =30V; see Figure 14; see Figure 15 -28 -nC
QG(tot) total gate charge - 130 - nC
Avalanche ruggedness

EDS(AL)S non-repetitive drain-source avalanche energy VGS =10V; Tj(init) =25 °C; ID =100 A; Vsup≤60 V; RGS =50Ω;
unclamped - 800 mJ
NXP Semiconductors PSMN3R0-60BS
N-channel 60 V 3.2 mΩ standard level MOSFET in D2PAK Pinning information

[1] It is not possible to make connection to pin 2 Ordering information Marking
Table 2. Pinning information
Table 3. Ordering information

PSMN3R0-60BS D2PAK plastic single-ended surface-mounted package (D2PAK); 3 leads
(one lead cropped)
SOT404
Table 4. Marking codes

PSMN3R0-60BS PSMN3R0-60BS
NXP Semiconductors PSMN3R0-60BS
N-channel 60 V 3.2 mΩ standard level MOSFET in D2PAK Limiting values

[1] Continuous current is limited by package
Table 5. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).
VDS drain-source voltage Tj≥25 °C; Tj≤ 175°C - 60 V
VDGR drain-gate voltage Tj≥25 °C; Tj≤ 175 °C; RGS =20kΩ -60 V
VGS gate-source voltage -20 20 V drain current VGS =10V; Tmb= 100 °C; see Figure 1 [1] - 83.4 A
VGS =10V; Tmb =25°C; see Figure 1 [1] - 100 A
IDM peak drain current pulsed; tp≤10 µs; Tmb =25°C;
see Figure 3 824 A
Ptot total power dissipation Tmb =25°C; see Figure 2 - 306 W
Tstg storage temperature -55 175 °C junction temperature -55 175 °C
Tsld(M) peak soldering temperature - 260 °C
Source-drain diode
source current Tmb =25°C [1] - 100 A
ISM peak source current pulsed; tp≤10 µs; Tmb=25°C - 824 A
Avalanche ruggedness

EDS(AL)S non-repetitive drain-source
avalanche energy
VGS =10V; Tj(init) =25°C; ID= 100A;
Vsup≤60 V; RGS =50 Ω; unclamped 800 mJ
NXP Semiconductors PSMN3R0-60BS
N-channel 60 V 3.2 mΩ standard level MOSFET in D2PAK
NXP Semiconductors PSMN3R0-60BS
N-channel 60 V 3.2 mΩ standard level MOSFET in D2PAK Thermal characteristics

Table 6. Thermal characteristics

Rth(j-mb) thermal resistance from junction to
mounting base
see Figure 4 - 0.3 0.49 K/W
Rth(j-a) thermal resistance from junction to
ambient
Minimum footprint; mounted in a
printed circuit board
-50 -K/W
NXP Semiconductors PSMN3R0-60BS
N-channel 60 V 3.2 mΩ standard level MOSFET in D2PAK Characteristics
Table 7. Characteristics
Static characteristics

V(BR)DSS drain-source breakdown
voltage= 250 µA; VGS =0 V; Tj= -55°C 54 --V= 250 µA; VGS =0 V; Tj=25°C 60 --V
VGS(th) gate-source threshold voltage ID =1mA; VDS =VGS; Tj =25°C;
see Figure 10; see Figure 11
234V
VGSth gate-source threshold voltage ID =1mA; VDS =VGS; Tj =175 °C;
see Figure 11 --V =1mA; VDS =VGS; Tj =-55 °C;
see Figure 11
--4.6 V
IDSS drain leakage current VDS =60V; VGS =0V; Tj=25°C - 0.05 10 µA
VDS =60V; VGS =0V; Tj= 175°C - - 500 µA
IGSS gate leakage current VGS =-20 V; VDS =0 V; Tj=25°C - 10 100 nA
VGS =20V; VDS =0V; Tj=25°C - 10 100 nA
RDSon drain-source on-state
resistance
VGS =10V; ID =25A; Tj =100 °C;
see Figure 12; see Figure 13 4.32 5.1 mΩ
VGS =10V; ID =25A; Tj =175 °C;
see Figure 12; see Figure 13 6.21 7.3 mΩ
VGS =10V; ID =25A; Tj =25°C;
see Figure 13
-2.7 3.2 mΩ gate resistance f=1 MHz - 1.1 - Ω
Dynamic characteristics

QG(tot) total gate charge ID =0A; VDS =0V; VGS=10V -110 -nC =25A; VDS =30V; VGS =10V;
see Figure 14; see Figure 15 130 - nC
QGS gate-source charge - 43 - nC
QGS(th-pl) post-threshold gate-source
charge
-21 -nC
QGD gate-drain charge - 28 - nC
VGS(pl) gate-source plateau voltage ID =25A; VDS =30V; see Figure 14;
see Figure 15
-5.2 -V
Ciss input capacitance VDS =30V; VGS =0V; f= 1MHz; =25 °C; see Figure 16; see Figure 9 8079 - pF
Coss output capacitance VDS =30V; VGS =0V; f= 1MHz; =25 °C; see Figure 16 971 - pF
Crss reverse transfer capacitance VDS =30V; VGS =0V; f= 1MHz; =25 °C; see Figure 16; see Figure 9 492 - pF
td(on) turn-on delay time VDS =30V; RL =0.5 Ω; VGS =10V;
RG(ext) =1.5Ω
-31 -ns rise time - 26 - ns
td(off) turn-off delay time - 77 - ns fall time - 22 - ns
NXP Semiconductors PSMN3R0-60BS
N-channel 60 V 3.2 mΩ standard level MOSFET in D2PAK

Source-drain diode

VSD source-drain voltage IS =25A; VGS =0V; Tj =25°C;
see Figure 17 0.88 1.2 V
trr reverse recovery time IS =25A; dIS/dt= -100 A/µs;
VGS =0V; VDS =30V
-54 -ns recovered charge - 97 - nC
Table 7. Characteristics …continued
NXP Semiconductors PSMN3R0-60BS
N-channel 60 V 3.2 mΩ standard level MOSFET in D2PAK
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