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PSMN102-200Y |PSMN102200YNXPN/a312avaiN-channel TrenchMOS SiliconMAX standard level FET


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PSMN102-200Y
N-channel TrenchMOS SiliconMAX standard level FET
Product profile1.1 General description
SiliconMAX standard level N-channel enhancement mode Field-Effect Transistor (FET) in
a plastic package using TrenchMOS technology. This product is designed and qualified for
use in computing, communications, consumer and industrial applications only.
1.2 Features and benefits
Higher operating power due to low
thermal resistance Suitable for high frequency
applications due to fast switching
characteristics
1.3 Applications
Class D amplifier DC-to-DC converters Motion control Switched-mode power supplies
1.4 Quick reference data

PSMN102-200Y
N-channel TrenchMOS SiliconMAX standard level FET
Rev. 03 — 16 March 2011 Product data sheet
Table 1. Quick reference data

VDS drain-source
voltage≥25 °C; Tj≤ 150°C - - 200 V drain current Tmb =25°C; VGS =10V;
see Figure 1; see Figure 3
--21.5 A
Ptot total power
dissipation
Tmb=25 °C; see Figure 2 --113 W
Static characteristics

RDSon drain-source
on-state
resistance
VGS =10V; ID =12A; =25°C; see Figure 9;
see Figure 10
-86 102 mΩ
Dynamic characteristics

QGD gate-drain charge VGS =10V; ID =12A;
VDS= 100 V; see Figure 11;
see Figure 12
-10.1 -nC
NXP Semiconductors PSMN102-200Y
N-channel TrenchMOS SiliconMAX standard level FET Pinning information
Ordering information Limiting values
Table 2. Pinning information
Table 3. Ordering information

PSMN102-200Y LFPAK plastic single-ended surface-mounted package (LFPAK); 4 leads SOT669
Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).
VDS drain-source voltage Tj≥25 °C; Tj≤ 150°C - 200 V
VDGR drain-gate voltage Tj≥25 °C; Tj≤ 150 °C; RGS =20kΩ - 200 V
VGS gate-source voltage -20 20 V drain current VGS =10V; Tmb =25°C; see Figure 1;
see Figure 3 21.5 A
VGS =10V; Tmb= 100 °C; see Figure 1 - 13.6 A
IDM peak drain current pulsed; tp≤10 µs; Tmb =25°C;
see Figure 3
-65 A
Ptot total power dissipation Tmb =25°C; see Figure 2 -113 W
Tstg storage temperature -55 150 °C junction temperature -55 150 °C
Source-drain diode
source current Tmb =25°C - 52 A
ISM peak source current pulsed; tp≤10 µs; Tmb=25°C - 208 A
Avalanche ruggedness

EDS(AL)S non-repetitive drain-source
avalanche energy
VGS =10V; Tj(init) =25°C; ID= 10.8A;
Vsup≤ 200 V; unclamped; tp= 0.14 ms;
RGS =50Ω 202 mJ
NXP Semiconductors PSMN102-200Y
N-channel TrenchMOS SiliconMAX standard level FET
NXP Semiconductors PSMN102-200Y
N-channel TrenchMOS SiliconMAX standard level FET Thermal characteristics

Table 5. Thermal characteristics

Rth(j-mb) thermal resistance from
junction to mounting base
Mounted on a printed-circuit board;
vertical in still air; see Figure 4
--1.1 K/W
NXP Semiconductors PSMN102-200Y
N-channel TrenchMOS SiliconMAX standard level FET Characteristics

Table 6. Characteristics
Static characteristics

V(BR)DSS drain-source
breakdown voltage =250 µA; VGS =0V; Tj=25°C 200 - - V =250 µA; VGS =0V; Tj= -55°C 178 - - V
VGS(th) gate-source threshold
voltage =1mA; VDS =VGS; Tj =25°C;
see Figure 7; see Figure 8
234V =1mA; VDS =VGS; Tj= 150 °C;
see Figure 7; see Figure 8 --V =1mA; VDS =VGS; Tj =-55 °C;
see Figure 7; see Figure 8
--4.4 V
IDSS drain leakage current VDS =160 V; VGS =0V; Tj=25°C --1 µA
VDS =160 V; VGS =0V; Tj= 150°C - - 100 µA
IGSS gate leakage current VGS =20V; VDS =0V; Tj=20°C - - 100 nA
VGS =-20 V; VDS =0V; Tj=20°C - - 100 nA
RDSon drain-source on-state
resistance
VGS =10V; ID =12A; Tj =25°C;
see Figure 9; see Figure 10 86 102 mΩ
VGS =10V; ID =12A; Tj= 150 °C;
see Figure 9; see Figure 10 206 245 mΩ gate resistance f=1 MHz - 1.1 - Ω
Dynamic characteristics

QG(tot) total gate charge ID =12A; VDS =100 V; VGS =10V;
see Figure 11; see Figure 12 30.7 - nC
QGS gate-source charge - 6.3 - nC
QGD gate-drain charge - 10.1 - nC
VGS(pl) gate-source plateau
voltage =12A; VDS= 100 V; see Figure 11;
see Figure 12
-4.6 -V
Ciss input capacitance VDS =30V; VGS=0 V; f=1 MHz; =25°C; see Figure 13 1568 - pF
Coss output capacitance - 170 - pF
Crss reverse transfer
capacitance
-55 -pF
td(on) turn-on delay time VDS =100 V; RL =5.8 Ω; VGS =10V;
RG(ext) =5.6Ω 14.2 - ns rise time - 29.5 - ns
td(off) turn-off delay time - 33 - ns fall time - 28 - ns
Source-drain diode

VSD source-drain voltage IS =12A; VGS =0V; Tj =25°C;
see Figure 14
-0.9 1.2 V
trr reverse recovery time IS =20A; dIS/dt= -100 A/µs; VGS =0V;
VDS =30V 143 - ns recovered charge IS =20A; dIS/dt= -100 A/µs; VGS=0V - 268 - nC
NXP Semiconductors PSMN102-200Y
N-channel TrenchMOS SiliconMAX standard level FET
NXP Semiconductors PSMN102-200Y
N-channel TrenchMOS SiliconMAX standard level FET
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