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PLB2224EV1.3 |PLB2224EV13INFINEONN/a12avai24 + 2G Switch on a Chip with Embedde...
PLB2224E-V1.3 |PLB2224EV13INFINEONN/a5avai24 + 2G Switch on a Chip with Embedde...


PLB2224EV1.3 ,24 + 2G Switch on a Chip with Embedde...Features Wire-Speed Performance on All Scheduling for QoS - IEEE 802.1p Ports 24 + 2G Single Chip ..
PLB2224E-V1.3 ,24 + 2G Switch on a Chip with Embedde...features support unmanaged, minimally managed (Smart), and fully managed Layer-2 switch configuratio ..
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PLB2224EV1.3-PLB2224E-V1.3
24 + 2G Switch on a Chip with Embedde...
PRODUCT
Infineon's PLB2224 is a highly integrated Layer 2+
switch-on-a-chip with twenty-four 10/100 Mbps and
two 10/100/1000 Mbps Ethernet ports. The PLB2224
provides wire-speed, full-duplex switching capability ':iiijiC",ii, 7
on all ports. On-chip memory for packet buffers and "Iii-ij,'-:.:",'.)',,,,,"",'."'''"',,)',''' (io,- _ -;
address tables eliminate the need for external memory ,3 . L, 'i/i,')'. " ",jitlrireji' irrhi a i Cir,- 1
resulting in smaller PCB real estate and lower power _ _-'ii'ilii_ii,,ij",iri'',r.r.'zr I £413.17 ' rtiii00iij '
. icy r T--- TYL-cr, i'“ -
consumption. ''iijiiis)))l b)lbl 'tCi---
The PLB2224 features support unmanaged, minimally "-, ",T=5irc-2',rC=C.' g '_-."- I-
managed (Smart), and fully managed Layer-2 switch l - 1117:" ID)! D _(,i-lii)s,/j'il
configurations. The Gigabit ports can be used to daisy ""--,_, "-rji2fe'ei'r.l . 1%,;{1' _ I F
chain multiple devices in a system providing even jLé. ',"', 1 7-...7 -_l;‘_:i 1‘ '-,
higher port counts for medium to large office buildings - c, 211; 1t'(l-alri'i! Ca" ''--aw..,,_''= - -s-.,
and multi-tenant, multi-dwelling units where power jjj.),, /fi' i, LU”! ('2‘: _fij),s F- . "----,.d' -
and space are at a premium. The high level ofintegra- -., j c-r! _ "‘- :tcuii'," E)" - ", -
tion in PLB2224 allows for design of systems with - -r 4. T; 1 C 'sa'li.tci''ti- via, .. - -
fewer components and a low bill of material. [ . C _ y, " [ 'i''"'--"')''')';,-'):,:,-;:),,,,:.
_ i I" ly; ' i F.
Features
I: 24 + 26 Single Chip Switch
I: On-chip Memory for Packet Buffer
and Address Tables. No External
Memory Required.
- 12 Mb of embedded DRAM for
Packets, for up to 1,000 Packets
- Up to 8K MAC Address Entries
with Auto Learning and Aging
" Supported Switch Configurations
- Fixed - Either 24 + 26,
48 or 48 + 26
- Stack - Up to 7 devices perstack
(168 + 26). Stack controlled
using PC Interface
I: L2 Switching with L2+ Packet
Processing
- Generic Pattern Recognition
Engine with 16 User
Programmable Patterns. Search
for Pattern Match within first 64B
of packet data.
- Can be used to detect
Control Packets such as
IGMP (IP Multicast) and
GVRP (VLAN Membership).
- Lookup Results Used to Filter
and/or Monitor Packets,
Change Forwarding Scope,
Modify Queue Assignment,
and Collect Statistics.
PL82224
I: Wire-Speed Performance on All
- Fast Ethernet Ports Support
10/100 Mbps
- Gigabit Ethernet Ports Support
10/100/1000 Mbps
- Half/Full Duplex Support on
All Ports at 10/100 Mbps,
Full Duplex at 1000 Mbps
- Auto-negotiation Support for
All Ports
- 802.3x compliant Flow Control
on Full Duplex Ports,
Congestion-based Flow Control
on Half Duplex Ports
I: Statistics Counters for
SNMP MIB ll & RMON1 MIB
" Port Monitoring
Supported Standards
" Bridging - IEEE 802.10 Compliant
with Support for Spanning Tree
a VLAN - IEEE 802.1Q Compliant
- Up to 1K Active VLANs
- Port or Tag based
1: Link Aggregation - IEEE 802.3ad
Compliant
- 2/4/8 FE Ports or 2 GE Ports per
Trunk. Multiple Trunks per
Device. Support for Resiliency
24 + 26 Switch on a Chip
with Embedded Memory
Never sto
I: Advanced Queuing and
Scheduling for QoS - IEEE 802.1p
Compliant
- 2 Queues per Port Supporting
Strict Priority and Weighted Fair
Queue (WFQ) Scheduling
Interfaces
11 SMII for Fast Ethernet Ports
" Mll/GMll/TBl for Gigabit Ethernet
u 32-Bit, 33 MHz PCI or Generic
Interface for External CPU
I: PC Interface for Configuration
EEPROM and Optional
CPU Connection.
" Simple Interface for Status LEDs.
" Power Consumption less than
n 1.8 V, 0.18 11 Logic Process with
Embedded DRAM, 3.3 V Tolerant
IEEE I
PLB2224 Plastic BGA-272
O''"''"""
Infineon
technologies
p thinking.
Typical Switch Configurations
PRODUCT
10/100 Mbps [24]
Small Form Factor 24 + 26 Layer-a Switch
PL32224
Octal Octal Octal
SMII SMII SMII
PHY PHY PHY
48-Port Managed Layer-a Switch
Applications
u Unmanaged, minimally managed
(Smart), or fully managed Layer-a
switches with small Form factors.
a 1oBaseS'" switches forthe
MDU/MTU markets.
I: Ethernet port concentrators for
data centers.
I: Ethernet back-planes for server
clusters.
How to reach us:
httpt//www.inrineonxom
Infineon Technologies Ardent, Inc.
510 Logue Avenue
Mountain View, CA 94043 USA
Published by
Intineon Technologies AG,
Bereich Kummunikation,
SL-Martin-Strasse 53,
D-81541 Milnchen
PL32224 C
24+2G PCI
Switch-on-a-Chip " F ,
10/100/1000 Mbps[2]
Octal GbE GbE
SMII PHY PHY
2xGMIl
—’ PLB2224
C Octal Octal Octal
P SMII SMII SMII
U PHY PHY PHY
Attention please'. Warnings
© Infineon Technologies AG 2001. All Rights Reserved.
Published by Infineon Technologies AG
The information herein is given to describe certain components
and shall not be considered as warranted characteristics.
Terms ofdelivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not
limited to warranties of non-infringement; regarding circuits, de-
scriptions and charts stated herein.
Infineon Technologies is an approved CECC manufacturer.
Information
Forfurther information on technology, delivery terms and
conditions and prices please contact yournearest
Infineon Technologies Office in Germany or our
Inrmeon Technologies Representatives worldwide.
Due to technical requirements components may contain danger-
ous substances. For information on the types in question please
contact your nearest lnrmeon Technologies omce.
Infineon Technologies Components may only be used in life-
support devices or systems with the express written approval of
Infineon Technologies, ifa failure ofsuch components can rea-
sonably be expected to cause the failure ofthat life-support de-
vice or system, or to affect the safety or effectiveness of that de-
vice or system. Life support devices orsystems are intended to
be implanted in the human body, orto support and/or maintain
and sustain and/or protect human life. If they fail, it is reason-
able to assume that the health ofthe user or other persons may
be endangered.
Ordering No. B192-H7918-X-X-7600
Printed in Germany
PS 06011. R&L
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