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PEMD2-PIMD2
NPN/PNP resistor-equipped transistors; R1 = 22 k惟, R2 = 22 k惟
1. Product profile
1.1 General descriptionNPN/PNP double Resistor-Equipped Transistors (RET) in Surface-Mounted
Device (SMD) plastic packages.
1.2 Features and benefits
1.3 Applications
1.4 Quick reference data
PEMD2; PIMD2; PUMD2
NPN/PNP resistor-equipped transistors;
R1 = 22 k, R2 = 22 k
Rev. 8 — 14 November 2013 Product data sheet
Table 1. Product overviewPEMD2 SOT666 - PEMB1 PEMH1 ultra small and flat lead
PIMD2 SOT457 SC-74 - - small
PUMD2 SOT363 SC-88 PUMB1 PUMH1 very small 100 mA output current capability Reduces component count Built-in bias resistors Reduces pick and place costs Simplifies circuit design AEC-Q101 qualified Low current peripheral driver Control of IC inputs Replaces general-purpose transistors in digital applications
Table 2. Quick reference data
Per transistor; for the PNP transistor with negative polarityVCEO collector-emitter voltage open base - - 50 V output current - - 100 mA bias resistor 1 (input) 15.4 22 28.6 k
R2/R1 bias resistor ratio 0.8 1 1.2
NXP Semiconductors PEMD2; PIMD2; PUMD2
NPN/PNP resistor-equipped transistors; R1 = 22 k, R2 = 22 k
2. Pinning information
3. Ordering information
4. Marking[1] * = placeholder for manufacturing site code
Table 3. Pinning
PEMD2 (SOT666); PUMD2 (SOT363)
PIMD2 (SOT457)
Table 4. Ordering informationPEMD2 - plastic surface-mounted package; 6 leads SOT666
PIMD2 SC-74 plastic surface-mounted package (TSOP6); 6 leads SOT457
PUMD2 SC-88 plastic surface-mounted package; 6 leads SOT363
Table 5. Marking codesPEMD2 D4
PIMD2 M5
PUMD2 D*2
NXP Semiconductors PEMD2; PIMD2; PUMD2
NPN/PNP resistor-equipped transistors; R1 = 22 k, R2 = 22 k
5. Limiting values[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
Table 6. Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).
Per transistor; for the PNP transistor with negative polarityVCBO collector-base voltage open emitter - 50 V
VCEO collector-emitter voltage open base - 50 V
VEBO emitter-base voltage open collector - 10 V input voltage TR1
positive - +40 V
negative - 10 V
input voltage TR2
positive +10
negative 40 output current - 100 mA
ICM peak collector current single pulse; 1ms
-100 mA
Ptot total power dissipation Tamb25C
PEMD2 (SOT666) [1] -200 mW
PIMD2 (SOT457) [1] 250 mW
PUMD2 (SOT363) [1] -200 mW
Per devicePtot total power dissipation Tamb25C
PEMD2 (SOT666) [1] -300 mW
PIMD2 (SOT457) [1] 400 mW
PUMD2 (SOT363) [1] -300 mW junction temperature - 150 C
Tamb ambient temperature 55 +150 C
Tstg storage temperature 65 +150 C
NXP Semiconductors PEMD2; PIMD2; PUMD2
NPN/PNP resistor-equipped transistors; R1 = 22 k, R2 = 22 k
6. Thermal characteristics[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
Table 7. Thermal characteristics
Per transistorRth(j-a) thermal resistance from
junction to ambient
in free air
PEMD2 (SOT666) [1]- - 625 K/W
PIMD2 (SOT457) [1]- - 500 K/W
PUMD2 (SOT363) [1]- - 625 K/W
Per deviceRth(j-a) thermal resistance from
junction to ambient
in free air
PEMD2 (SOT666) [1]- - 417 K/W
PIMD2 (SOT457) [1]- - 313 K/W
PUMD2 (SOT363) [1]- - 417 K/W
NXP Semiconductors PEMD2; PIMD2; PUMD2
NPN/PNP resistor-equipped transistors; R1 = 22 k, R2 = 22 k
