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DS4302Z-020+ |DS4302Z020+MAXIMN/a1500avai2-Wire, 5-Bit DAC with Three Digital Outputs


DS4302Z-020+ ,2-Wire, 5-Bit DAC with Three Digital OutputsPin Description Pin ConfigurationPIN NAME FUNCTIONTOP VIEW1 SCL Serial Clock Input. 2-wire clock in ..
DS4303 ,Voltage Sample and Infinite HoldApplications♦ Low Power ConsumptionPower-Supply Calibration♦ 2.4V to 3.6V Single-Supply OperationTh ..
DS4303K ,Electronically Programmable Voltage ReferenceApplications♦ Low Power ConsumptionPower-Supply Calibration♦ 2.4V to 3.6V Single-Supply OperationTh ..
DS4402N+T&R ,Two/Four-Channel, I²C Adjustable Current DACApplications 2Devices on Same I C BusPower-Supply Adjustment ♦ Small Package (14-Pin TDFN)♦ -40°C t ..
DS4402N+TR , Two/Four-Channel, I2C Adjustable Current DAC
DS4404N+ ,Two/Four-Channel, I²C Adjustable Current DACELECTRICAL CHARACTERISTICS(V = +2.7V to +5.5V, T = -40°C to +85°C.)CC APARAMETER SYMBOL CONDITIONS ..
EC2-12NU ,COMPACT AND LIGHTWEIGHT, SMALL MOUNTING SIZE, HIGH BREAKDOWN VOLTAGE
EC2-24 ,COMPACT AND LIGHTWEIGHT, SMALL MOUNTING SIZE, HIGH BREAKDOWN VOLTAGE
EC2-24NU ,COMPACT AND LIGHTWEIGHT, SMALL MOUNTING SIZE, HIGH BREAKDOWN VOLTAGE
EC2-4.5NJ ,COMPACT AND LIGHTWEIGHT, SMALL MOUNTING SIZE, HIGH BREAKDOWN VOLTAGE
EC2-4.5NU ,COMPACT AND LIGHTWEIGHT, SMALL MOUNTING SIZE, HIGH BREAKDOWN VOLTAGE
EC2-4.5TNU ,COMPACT AND LIGHTWEIGHT, SMALL MOUNTING SIZE, HIGH BREAKDOWN VOLTAGE


DS4302Z-020+
2-Wire, 5-Bit DAC with Three Digital Outputs
General Description
The DS4302 is a 5-bit digital-to-analog converter (DAC)
with three programmable digital outputs. The DS4302
communicates through a 2-wire, SMBus™-compatible,
serial interface. The tiny 8-pin µSOP package is ideal
for use in space-constrained applications.
Applications

CCFL Backlight Brightness Control
Power-Supply Calibration
Features
SO Package is a Drop-In Replacement for the
MPS1251 and MPS1252
Single 5-Bit DAC (32 Steps)0V to 2V and 0V to 1.9V VersionsThree Programmable Digital OutputsSMBus-Compatible Serial Interface4.5V to 5.5V Supply Voltage Range8-Pin SO and 8-Pin µSOP PackagesIndustrial Temperature Range: -40°C to +85°C
DS4302
2-Wire, 5-Bit DAC with Three Digital Outputs

TOP VIEWGND
VCCSDA
VOUT
SCL
SO/µSOP

DS4302
Pin Configuration
Ordering Information

Rev 1; 6/04
Add “/T&R” for tape-and-reel orders.
*Contact factory for availability.
SMBus is a trademark of Intel Corp.
PARTVOUT
RANGE
TOP
BRAND
PIN-
PACKAGE

DS4302Z-0200V to 2.0V4302B8 SO
DS4302Z-019*0V to 1.9V4302A8 SO
DS4302U-0200V to 2.0V4302B8 µSOP
DS4302U-019*0V to 1.9V4302A8 µSOP
Pin Description
PINNAMEFUNCTION
SCLSerial Clock Input. 2-wire clock input.SDASerial Data Input/Output. Bidirectional,
2-wire data pin.
3VOUTDAC Output VoltageGNDGround
5P2
6P1
7P0
Programmable Digital Output
8VCCPower-Supply Input
DS4302
2-Wire, 5-Bit DAC with Three Digital Outputs
ABSOLUTE MAXIMUM RATINGS
RECOMMENDED DC OPERATING CONDITIONS

(TA= -40°C to +85°C)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Voltage Range on VCC, SDA, and SCL Pins
Relative to Ground.............................................-0.5V to +6.0V
Operating Temperature Range...........................-40°C to +85°C
Storage Temperature Range.............................-55°C to +125°C
Soldering Temperature.....See IPC/JEDEC J-STD-020A Specification
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

Supply VoltageVCC(Note 1)4.55.5V
Input Logic 1 (SDA, SCL)VIH2.0VCC + 0.3V
Input Logic 0 (SDA, SCL)VILGND - 0.30.8V
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

Standby CurrentISTBY(Notes 2, 3)200300µA
Input LeakageIL(Note 4)-1.0+1.0µA
3mA sink current0.00.4SDA Low-Level Output VoltageVOL16mA sink current0.00.6V
P0, P1, P2 Low-Level Output
VoltageVOL2(Note 1)
4mA sink+0.4VV
P0, P1, P2 High-Level Output
VoltageVOH(Note 1)
4mA sourceVCC - 0.4VV
VOUT Maximum Level (-020)VCC = 5.0V, Data = 00000XXX (Note 3)1.9252.02.075V
VOUT Minimum Level (-020)VCC = 5.0V, Data = 11111XXX0.00.050.1V
VOUT Maximum Level (-019)VCC = 5.0V, Data = 00000XXX (Note 3)1.8251.91.975V
VOUT Minimum Level (-019)VCC = 5.0V, Data = 11111XXX0.00.050.1V
Power-On Reset1.7V
Settling Time10µs
D/A Output Levels32steps
DC ELECTRICAL CHARACTERISTICS

(VCC= +4.5V to 5.5V, TA= -40°C to +85°C.)
X = Don’t care.
DS4302
2-Wire, 5-Bit DAC with Three Digital Outputs
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

SCL Clock FrequencyfSCL0400kHz
Bus Free Time Between STOP
and START ConditionstBUF1.3µs
Low Period of SCLtLOW1.3µs
High Period of SCLtHIGH0.6µs
Data Hold TimetHD:DAT00.9µs
Data Setup TimetSU:DAT100ns
Start Setup TimetSU:STA0.6µs
SDA and SCL Rise TimetR(Note 5)20 + 0.1CB300ns
SDA and SCL Fall TimetF(Note 5)20 + 0.1CB300ns
Stop Setup TimetSU:STO0.6µs
SDA and SCL Capacitive
LoadingCB(Note 5)400pF
AC ELECTRICAL CHARACTERISTICS (Figure3)

(VCC= +4.5V to 5.5V, TA= -40°C to +85°C, timing referenced to VIL(MAX)and VIH(MIN).)
Note 1:
All voltages referenced to ground.
Note 2:
ISTBYspecified for the inactive state measured with SDA = SCL = VCCand with VOUT, P0, P1, and P2 floating.
Note 3:
No load on VOUT.
Note 4:
The DS4302 will not obstruct the SDA and SCL lines if VCCis switched off as long as the voltages applied to these inputs
does not violate their min and max input-voltage levels.
Note 5:
CB—total capacitance of one bus line in picofarads.
DS4302
2-Wire, 5-Bit DAC with Three Digital Outputs
Typical Operating Characteristics

(VCC= +5.0V, TA = +25°C.)
STANDBY SUPPLY CURRENT
vs. SUPPLY VOLTGE

DS4302 toc01
SUPPLY VOLTAGE (V)
STANDBY SUPPLY CURRENT (
OUTPUTS UNLOADED
SDA = SCL = VCC
STANDBY SUPPLY CURRENT
vs. TEMPERATURE

DS4302 toc02
TEMPERATURE (°C)
STANDBY SUPPLY CURRENT (40600-20
OUTPUTS UNLOADED
SDA = SCL = VCC = 5.0V
SUPPLY CURRENT
vs. SCL FREQUENCY

DS4302 toc03
SCL FREQUENCY (kHz)
SUPPLY CURRENT (
OUTPUTS UNLOADED
SDA = VCC
VOUT vs. DAC SETTING

DS4302 toc04
DAC SETTING (dec)
OUT
(V)252015105
DS4302-020 VERSION
VOUT vs. SUPPLY VOLTAGE

DS4302 toc05
SUPPLY VOLTAGE (V)
OUT
(V)
VCC = SDA = SCL
VOUT PERCENT CHANGE FROM +25°C
vs. TEMPERATURE

DS4302 toc06
TEMPERATURE (°C)
OUT
PERCENT CHANGE (%)6040200-20
VCC = SDA = SCL
DS4302
2-Wire, 5-Bit DAC with Three Digital Outputs
Functional Diagram

2-WIRE
INTERFACE
GND
5-BIT
DAC
VOUT
BANDGAP
REFERENCE
SCL
SDA
MSBLSB
DATA BYTE REGISTER
DAC VALUEP0P2P1
VCC
VCC
OUTPUT CELL
VCC
OUTPUT CELL
OUTPUT CELL
BUFFER
DS4302
DS4302
Detailed Description

The DS4302 contains a 5-bit DAC and three programma-
ble digital outputs. The DAC setting and the pro-
grammed output levels are contained in a 1-byte data
word that defaults to 00h on power-up (see Figure 1 for
data byte configuration). The upper 5 MSbits of the byte
set the DAC and control the voltage produced on VOUT.
A setting of 1111 1XXX sets the minimum output voltage
from the DAC while a setting of 0000 0XXX sets the maxi-
mum output voltage from the DAC. The three LSbits of
the data byte control the three output pins, P0, P1, and
P2. Setting any of these control bits to a 0 pulls the corre-
sponding outputs low and setting the bits to a 1 pulls the
outputs high.
The DS4302 communicates through a 2-wire (SMBus-
compatible) digital interface and has a 2-wire address of
58h. Write and read operations are used to access the
DAC and output settings. Each operation begins with a
2-wire START condition, consists of three bytes, and
ends with a 2-wire STOP condition (see Figure 2). Using
the write operation, the 2-wire master can program the
5-bit DAC to adjust the voltage on VOUT and set the
level of the three output pins: P0, P1, and P2. The read
operation is used to recall the programmed settings.
2-Wire Definitions

The following terminology is commonly used to
describe 2-wire data transfers.
Master Device:
The master device controls the slave
devices on the bus. The master device generates SCL
clock pulses, START, and STOP conditions.
Slave Devices:
Slave devices send and receive data
at the master’s request.
Bus Idle or Not Busy:
Time between STOP and START
conditions when both SDA and SCL are inactive and in
their logic-high states. When the bus is idle, it initiates a
low-power mode for slave devices.
START Condition:
A START condition is generated by
the master to initiate a new data transfer with a slave.
Transitioning SDA from high to low while SCL remains
high generates a START condition. See Figure3 for
applicable timing.
STOP Condition:
A STOP condition is generated by the
master to end a data transfer with a slave. Transitioning
SDA from low to high while SCL remains high generates
a STOPcondition. See Figure3 for applicable timing.
Bit Write:
Transitions of SDA must occur during the low
state of SCL. The data on SDA must remain valid and
unchanged during the entire high pulse of SCL plus the
setup and hold time requirements (see Figure3). Data is
shifted into the device during the rising edge of the SCL.
2-Wire, 5-Bit DAC with Three Digital Outputs

DATA BYTE
MSB
DAC VALUEP0P2P1
Figure 1. Data Byte Configuration
Figure 2. 2-Wire Communication ExamplesSTART
8-BITS ADDRESS OR DATA
STOP
ACKWHITE BOXES INDICATE THE MASTER IS
CONTROLLING SDA
SHADED BOXES INDICATE THE SLAVE IS
CONTROLLING SDA
WRITE A SINGLE BYTEAAh
READ A SINGLE BYTE00h59h
58h
COMMUNICATIONS KEY
XXXXXXXX
01011000ADATA BYTEAP
NOTES:

1) ALL BYTES ARE SENT MOST SIGNIFICANT BIT FIRST.
2) THE FIRST BYTE SENT AFTER A START CONDITION IS
ALWAYS THE SLAVE ADDRESS FOLLOWED BY THE
READ/WRITE BIT.
0000111101011001AADATA BYTEAP00000000
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