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AD637SD/883B |AD637SD883BADN/a4avaiHigh Precision, Wide-Band RMS-to-DC Converter


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AD637SD/883B
High Precision, Wide-Band RMS-to-DC Converter
FUNCTIONAL BLOCK DIAGRAMS
REV.EHigh Precision,
Wide-Band RMS-to-DC Converter

The AD637 is available in two accuracy grades (J, K) for com-
mercial (0°C to +70°C) temperature range applications; two
accuracy grades (A, B) for industrial (–40°C to +85°C) applica-
tions; and one (S) rated over the –55°C to +125°C temperature
range. All versions are available in hermetically-sealed, 14-lead
side-brazed ceramic DIPs as well as low cost cerdip packages. A
16-lead SOIC package is also available.
PRODUCT HIGHLIGHTS
The AD637 computes the true root-mean-square, mean
square, or absolute value of any complex ac (or ac plus dc)
input waveform and gives an equivalent dc output voltage.
The true rms value of a waveform is more useful than an
average rectified signal since it relates directly to the power of
the signal. The rms value of a statistical signal is also related
to the standard deviation of the signal.The AD637 is laser wafer trimmed to achieve rated perfor-
mance without external trimming. The only external compo-
nent required is a capacitor which sets the averaging time
period. The value of this capacitor also determines low fre-
quency accuracy, ripple level and settling time.The chip select feature of the AD637 permits the user to
power down the device down during periods of nonuse,
thereby, decreasing battery drain in remote or hand-held
applications.The on-chip buffer amplifier can be used as either an input
buffer or in an active filter configuration. The filter can be
used to reduce the amount of ac ripple, thereby, increasing
the accuracy of the measurement.
PRODUCT DESCRIPTION

The AD637 is a complete high accuracy monolithic rms-to-dc
converter that computes the true rms value of any complex
waveform. It offers performance that is unprecedented in inte-
grated circuit rms-to-dc converters and comparable to discrete
and modular techniques in accuracy, bandwidth and dynamic
range. A crest factor compensation scheme in the AD637 per-
mits measurements of signals with crest factors of up to 10 with
less than 1% additional error. The circuit’s wide bandwidth per-
mits the measurement of signals up to 600 kHz with inputs of
200 mV rms and up to 8 MHz when the input levels are above
1 V rms.
As with previous monolithic rms converters from Analog Devices,
the AD637 has an auxiliary dB output available to the user. The
logarithm of the rms output signal is brought out to a separate
pin allowing direct dB measurement with a useful range ofdB. An externally programmed reference current allows the
user to select the 0 dB reference voltage to correspond to any
level between 0.1 V and 2.0 V rms.
A chip select connection on the AD637 permits the user to
decrease the supply current from 2.2 mA to 350mA during
periods when the rms function is not in use. This feature facili-
tates the addition of precision rms measurement to remote or
hand-held applications where minimum power consumption is
critical. In addition when the AD637 is powered down the out-
put goes to a high impedance state. This allows several AD637s
to be tied together to form a wide-band true rms multiplexer.
The input circuitry of the AD637 is protected from overload
voltages that are in excess of the supply levels. The inputs will
not be damaged by input signals if the supply voltages are lost.
FEATURES
High Accuracy
0.02% Max Nonlinearity, 0V to 2V RMS Input
0.10% Additional Error to Crest Factor of 3
Wide BandwidthMHz at 2V RMS Input
600kHz at 100mV RMS
Computes:
True RMS
Square
Mean Square
Absolute Value
dB Output (60dB Range)
Chip Select-Power Down Feature Allows:
Analog “3-State” Operation
Quiescent Current Reduction from 2.2mA to 350
mA
Side-Brazed DIP, Low Cost Cerdip and SOIC
AD637–SPECIFICATIONS(@ +258C, and 615 V dc unless otherwise noted)
NOTESAccuracy specified 0-7 V rms dc with AD637 connected as shown in Figure 2.Nonlinearity is defined as the maximum deviation from the straight line connecting the readings at 10 mV and 2 V.Error vs. crest factor is specified as additional error for 1 V rms.Input voltages are expressed in volts rms. % are in % of reading.With external 2 kW pull down resistor tied to –VS.
Specifications subject to change without notice.
Specifications shown in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All min
and max specifications are guaranteed, although only those shown in boldface are tested on all production units.
ABSOLUTE MAXIMUM RATINGS

ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 V
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –18 V dc
Internal Quiescent Power Dissipation . . . . . . . . . . . . 108 mW
Output Short-Circuit Duration . . . . . . . . . . . . . . . . .Indefinite
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering 10 secs) . . . . . . . +300°C
Rated Operating Temperature Range
AD637J, K . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
AD637A, B . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
AD637S, 5962-8963701CA . . . . . . . . . . . –55°C to +125°C
ORDERING GUIDE

*A standard microcircuit drawing is available.
Figure 1.Simplified Schematic
CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection.
AD637
AD637
the AD637 can be ac coupled through the addition of a non-
polar capacitor in series with the input as shown in Figure 2.
Figure 2.Standard RMS Connection
The performance of the AD637 is tolerant of minor variations in
the power supply voltages, however, if the supplies being used
exhibit a considerable amount of high frequency ripple it is
advisable to bypass both supplies to ground through a 0.1 mF
ceramic disc capacitor placed as close to the device as possible.
The output signal range of the AD637 is a function of the sup-
ply voltages, as shown in Figure 3. The output signal can be
used buffered or nonbuffered depending on the characteristics
of the load. If no buffer is needed, tie buffer input (Pin 1) to
common. The output of the AD637 is capable of driving 5mA
into a 2kW load without degrading the accuracy of the device.
Figure 3.AD637 Max VOUT vs. Supply Voltage
CHIP SELECT

The AD637 includes a chip select feature which allows the user
to decrease the quiescent current of the device from 2.2mA to
350mA. This is done by driving the CS, Pin 5, to below 0.2V
dc. Under these conditions, the output will go into a high im-
pedance state. In addition to lowering power consumption, this
feature permits bussing the outputs of a number of AD637s to
FUNCTIONAL DESCRIPTION

The AD637 embodies an implicit solution of the rms equation
that overcomes the inherent limitations of straightforward rms
computation. The actual computation performed by the AD637
follows the equation
Figure 1 is a simplified schematic of the AD637, it is subdivided
into four major sections; absolute value circuit (active rectifier),
square/divider, filter circuit and buffer amplifier. The input volt-
age VIN which can be ac or dc is converted to a unipolar current
I1 by the active rectifier A1, A2. I1 drives one input of the
squarer divider which has the transfer function
The output current of the squarer/divider, I4 drives A4 which
forms a low-pass filter with the external averaging capacitor. If
the RC time constant of the filter is much greater than the long-
est period of the input signal than A4s output will be propor-
tional to the average of I4.The output of this filter amplifier is
used by A3 to provide the denominator current I3 which equals
Avg. I4 and is returned to the squarer/divider to complete the
implicit rms computation.
and
VOUT = VIN rms
If the averaging capacitor is omitted, the AD637 will compute the
absolute value of the input signal. A nominal 5pF capacitor should
be used to insure stability. The circuit operates identically to that of
the rms configuration except that I3 is now equal to I4 giving
The denominator current can also be supplied externally by pro-
viding a reference voltage, VREF, to Pin 6. The circuit operates
identically to the rms case except that I3 is now proportional to
VREF. Thus:
and
This is the mean square of the input signal.
STANDARD CONNECTION

The AD637 is simple to connect for a majority of rms measure-
ments. In the standard rms connection shown in Figure 2, only
a single external capacitor is required to set the averaging time
constant.In this configuration, the AD637 will compute the
true rms of any input signal. An averaging error, the magnitude
of which will be dependent on the value of the averaging capaci-
OPTIONAL TRIMS FOR HIGH ACCURACY
The AD637 includes provisions to allow the user to trim out
both output offset and scale factor errors. These trims will result
in significant reduction in the maximum total error as shown in
Figure 4. This remaining error is due to a nontrimmable input
offset in the absolute value circuit and the irreducible non-
linearity of the device.
The trimming procedure on the AD637 is as follows:Ground the input signal, VIN and adjust R1 to give 0V out-
put from Pin 9. Alternatively R1 can be adjusted to give the
correct output with the lowest expected value of VIN.Connect the desired full scale input to VIN, using either a dc
or a calibrated ac signal, trim R3 to give the correct output at
Pin 9, i.e., 1 V dc should give l.000 V dc output. Of course, a
2 V peak-to-peak sine wave should give 0.707 V dc output.
Remaining errors are due to the nonlinearity.
Figure 4.Max Total Error vs. Input Level AD637K
Internal and External Trims
OUTPUT

Figure 5.Optional External Gain and Offset Trims
CHOOSING THE AVERAGING TIME CONSTANT

The AD637 will compute the true rms value of both dc and ac
functions of input signal frequency f, and the averaging time
constant t (t: 25ms/mF of averaging capacitance). As shown in
Figure 6, the averaging error is defined as the peak value of the
ac component, ripple, plus the value of the dc error.
The peak value of the ac ripple component of the averaging er-
ror is defined approximately by the relationship:
Figure 6.Typical Output Waveform for a Sinusoidal Input
This ripple can add a significant amount of uncertainty to the
accuracy of the measurement being made. The uncertainty can
be significantly reduced through the use of a post filtering net-
work or by increasing the value of the averaging capacitor.
The dc error appears as a frequency dependent offset at the
output of the AD637 and follows the equation:
Since the averaging time constant, set by CAV, directly sets the
time that the rms converter “holds” the input signal during
computation, the magnitude of the dc error is determined only
by CAV and will not be affected by post filtering.
Figure 7.Comparison of Percent DC Error to the Percent
Peak Ripple over Frequency Using the AD637 in the Stan-
dard RMS Connection with a 1 · mF CAV
The ac ripple component of averaging error can be greatly
reduced by increasing the value of the averaging capacitor.
There are two major disadvantages to this:first, the value of the
averaging capacitor will become extremely large and second, the
settling time of the AD637 increases in direct proportion to the
value of the averaging capacitor (Ts = 115 ms/mF of averaging
AD637
RMSBUFFER
BUFFER INPUT
FILTER, SHORT
RX AND
REMOVE C3

Figure 8.Two Pole Sallen-Key Filter
Figure 9a shows values of CAV and the corresponding averaging
error as a function of sine-wave frequency for the standard rms
connection. The 1% settling time is shown on the right side of
the graph.
Figure 9b shows the relationship between averaging error, signal
frequency settling time and averaging capacitor value. This
graph is drawn for filter capacitor values of 3.3 times the averag-
ing capacitor value. This ratio sets the magnitude of the ac and
dc errors equal at 50 Hz. As an example, by using a 1mF averag-
ing capacitor and a 3.3mF filter capacitor, the ripple for a 60Hz
input signal will be reduced from 5.3% of reading using the
averaging capacitor alone to 0.15% using the single pole filter.
This gives a factor of thirty reduction in ripple and yet the set-
tling time would only increase by a factor of three. The values of
CAV and C2, the filter capacitor, can be calculated for the desired
value of averaging error and settling time by using Figure 9b.
The symmetry of the input signal also has an effect on the mag-
nitude of the averaging error. Table I gives practical component
values for various types of 60 Hz input signals. These capacitor
values can be directly scaled for frequencies other than 60 Hz,
i.e., for 30 Hz double these values, for 120 Hz they are halved.
For applications that are extremely sensitive to ripple, the two pole
configuration is suggested. This configuration will minimize
capacitor values and settling time while maximizing performance.
Figure 9c can be used to determine the required value of CAV,
C2 and C3 for the desired level of ripple and settling time.
Figure 9a.
Figure 9b.
Figure 9c.
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