74ACT245TTR ,OCTAL BUS TRANSCEIVER (3-STATE)Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional o ..
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74ACT245M-74ACT245TTR
OCTAL BUS TRANSCEIVER (3-STATE)
1/9April 2001 HIGH SPEED: tPD = 5.4ns (TYP.) at VCC = 5V LOW POWER DISSIPATION:CC = 4 μA(MAX.) at TA =25°C COMPATIBLE WITH TTL OUTPUTS
VIH = 2V (MIN.), VIL = 0.8V (MAX.) 50Ω TRANSMISSION LINE DRIVING
CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE:OH| = IOL = 24mA (MIN) BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL OPERATING VOLTAGE RANGE:CC (OPR) = 4.5V to 5.5V PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 245 IMPROVED LATCH-UP IMMUNITY
DESCRIPTIONThe 74ACT245 is an advanced high-speed CMOS
OCTAL BUS TRANSCEIVER (3-STATE)
fabricated with sub-micron silicon gate and
double-layer metal wiring C2 MOS tecnology.
This IC is intended for two-way asynchronous
communication between data buses and the
direction of data transmission is determined by
DIR input. The enable input G can be used to
disable the device so that the buses are effectively
isolated.
The device is designed to interface directly High
Speed CMOS systems with TTL, NMOS and
CMOS output voltage levels.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
IT IS PROHIBITED TO APPLY A SIGNAL TO A
TERMINAL WHEN IT IS IN OUTPUT MODE AND
WHEN A BUS THERMINAL IS FLOATING (HIGH
IMPEDANCE STATE) IT IS REQUIRED TO FIX
THE INPUT LEVEL BY MEANS OF EXTERNAL
PULL DOWN OR PULL UP RESISTOR.
74ACT245OCTAL BUS TRANSCEIVER
WITH 3 STATE OUTPUTS (NON INVERTED)
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
74ACT2452/9
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE X : Don’t Care
Z : High Impedance
ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
RECOMMENDED OPERATING CONDITIONS 1) VIN from 0.8V to 2.0V
74ACT2453/9
DC SPECIFICATIONS 1) Maximum test duration 2ms, one output loaded at time
2) Incident wave switching is guaranteed on transmission lines with impedances as low as 50Ω
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, RL = 500 Ω, Input tr = tf = 3ns) (*) Voltage range is 5.0V ± 0.5V
74ACT2454/9
CAPACITIVE CHARACTERISTICS 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/16 (per
circuit)
TEST CIRCUIT CL = 50pF or equivalent (includes jig and probe capacitance)
RL = R1 = 500Ω or equivalent
RT = ZOUT of pulse generator (typically 50Ω)
74ACT2455/9
WAVEFORM 1: PROPAGATION DELAYS (f=1MHz; 50% duty cycle)
WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle)
